DC-DC Converter Integrated with Asymmetrical Multi-Level Inverter for Solar PV Application

K, Apoorva G; Savyasachi, G K; Shashikala, M. S.

doi:10.1109/ctceec.2017.8455185

Cited by 1 publication

(1 citation statement)

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“…The authors in [34] presented a parallel multiple-input PEC with boost stages operating in CCM to feed an h-bridge inverter configuration and included a design analysis; although the controllers were independent for all of the PVM, the authors solved the booststages equalization problem by integrating two additional MOSFETS per stage to achieve the decoupling, increasing monetary and computational costs and decreasing efficiency. In [35], the authors analyzed the symmetric configuration of boost interleaved and paralleled stages in CCM to combine FC and PVM.…”

Section: Introductionmentioning

confidence: 99%

Study on Multiple Input Asymmetric Boost Converters with Simultaneous and Sequential Triggering

et al. 2021

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Paralleled boost asymmetric configurations operating in discontinuous conduction mode (DCM) are suitable for integrating dissimilar green energy generating sources and control algorithms in versatile scenarios where voltage step-up, low cost, stable operation, low output ripple, uncomplicated design, and acceptable efficiency are needed. Unfortunately, research has mainly been conducted on the buck, sepic, switched-capacitor, among other asymmetric configurations operating in continuous conduction mode (CCM), to the authors’ knowledge. For asymmetric boost type topologies, achieving simultaneous CCM is not a trivial task, and other problems such as circulating currents arise. Research for interleaved converters cannot be easily extended to asymmetric boost topologies due to the dissimilarity of control algorithms and types of sources and parallel stages. This paper analytically establishes properties of stability, output ripple, output voltage, and design for asymmetrical paralleled boost converters operating in DCM with simultaneous or phase delayed (sequential) triggering. A 300 W experimental design and the respective tests allow validation of such properties, resulting in an easy-to-implement configuration with acceptable efficiency.

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Section: Introductionmentioning

confidence: 99%