2019
DOI: 10.1109/tc.2019.2930972
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DC-PCM: Mitigating PCM Write Disturbance with Low Performance Overhead by Using Detection Cells

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Cited by 7 publications
(2 citation statements)
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“…Despite these advantages, PCM suffers from low reliability and endurance problems, which need to be addressed in order to use PCM as main memory. Reliability issues in PCM are mainly caused by write disturbance errors (WDEs) [6]- [8]. WDEs refer to a phenomenon whereby surrounding cells of the written cell are damaged owing to thermal interference.…”
Section: Introductionmentioning
confidence: 99%
“…Despite these advantages, PCM suffers from low reliability and endurance problems, which need to be addressed in order to use PCM as main memory. Reliability issues in PCM are mainly caused by write disturbance errors (WDEs) [6]- [8]. WDEs refer to a phenomenon whereby surrounding cells of the written cell are damaged owing to thermal interference.…”
Section: Introductionmentioning
confidence: 99%
“…As Moore's law approaches its limits, further boosting the integration density of conventional volatile memories becomes extremely difficult [1]. In view of this, the concept of properly scalable non-volatile memory has become a topic of intensive study over the past decade, resulting in the emergence of several non-volatile memory devices such as ferroelectric RAM (FeRAM) [2][3][4], magnetic RAM (MRAM) [5][6][7], phase-change RAM (PCRAM) [8][9][10], and resistive RAM (RRAM) [11][12][13]. Out of these competing possibillities, PCRAM offers the widest range of advantages including superb scalability [14], fast write/read speeds [15], low energy consumption [16], and a long data retention time [17].…”
Section: Introductionmentioning
confidence: 99%