2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA) 2021
DOI: 10.1109/hpca51647.2021.00048
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Deadline-Aware Offloading for High-Throughput Accelerators

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Cited by 10 publications
(1 citation statement)
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“…This enables us to derive a simpler but more effective solution that leverages DNNspecific features (e.g., characteristics of each layer). Several QoS-aware GPU schedulers in a datacenter environment [10], [11] perform task prioritization based on estimated QoS slack time. However, their estimation is less precise in an NPU setting for not utilizing data fetch and Copyright c 2022 The Institute of Electronics, Information and Communication Engineers compute time, which can be readily estimated on NPUs with high precision.…”
Section: Introductionmentioning
confidence: 99%
“…This enables us to derive a simpler but more effective solution that leverages DNNspecific features (e.g., characteristics of each layer). Several QoS-aware GPU schedulers in a datacenter environment [10], [11] perform task prioritization based on estimated QoS slack time. However, their estimation is less precise in an NPU setting for not utilizing data fetch and Copyright c 2022 The Institute of Electronics, Information and Communication Engineers compute time, which can be readily estimated on NPUs with high precision.…”
Section: Introductionmentioning
confidence: 99%