“…For instance, REG3 is clocked just after initialization of REG1. As a result, bits of register REG3 are shifted downwards, i.e., REG3 [22], REG3 [21], REG3 [11], and REG3 [8] are assigned known value of REG3 [21], REG3 [20], REG3 [10], and REG3 [7], respectively, and the XORing result of feedback polynomial is set to REG3[0]. In this way, REG3[0], REG3 [8], and REG3 [11] become known and REG3 [7], REG3 [10], and REG3 [20] become unknown and the remaining positions of REG3 remain unknown since downwards shifting is done by an unknown value.…”