2024
DOI: 10.3390/electronics13152993
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Deep Learning Approach for Modeling the Power Consumption and Delay of Logic Circuits Employing GNRFET Technology

Recep Emir,
Dilek Surekci Yamacli,
Serhan Yamacli
et al.

Abstract: The interest in alternative logic technologies is continuously increasing for short nanometer designs. From this viewpoint, logic gates, full adder and D-latch designs based on graphene nanoribbon field effect transistors (GNRFETs) at 7 nm technology nodes were presented, considering that these structures are core elements for digital integrated circuits. Firstly, NOT, NOR and NAND gates were implemented using GNRFETs. Then, 28T full adder and 18T D-latch circuits based on CMOS logic were designed using GNRFET… Show more

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