Defect inspection strategies for 14 nm semiconductor technology

Buengener, Ralf

doi:10.1117/12.928664

Cited by 10 publications

(3 citation statements)

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“…As a result, the requirements for wafer inspection are becoming more stringent in terms of efficiency and sensitivity. However, achieving both high efficiency and high sensitivity simultaneously is a significant challenge due to mutual constraints [ 1 , 2 ]. Several techniques for wafer inspection, such as scanning electron microscopy (SEM) [ 3 , 4 ], atomic force microscopy [ 5 , 6 ], and confocal microscopy [ 7 ], exhibit excellent sensitivity but have relatively low throughput.…”

Section: Introductionmentioning

confidence: 99%

Balancing the Efficiency and Sensitivity of Defect Inspection of Non-Patterned Wafers with TDI-Based Dark-Field Scattering Microscopy

Yu,

Xu,

Wang

et al. 2024

Sensors

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In semiconductor manufacturing, defect inspection in non-patterned wafer production lines is essential to ensure high-quality integrated circuits. However, in actual production lines, achieving both high efficiency and high sensitivity at the same time is a significant challenge due to their mutual constraints. To achieve a reasonable trade-off between detection efficiency and sensitivity, this paper integrates the time delay integration (TDI) technology into dark-field microscopy. The TDI image sensor is utilized instead of a photomultiplier tube to realize multi-point simultaneous scanning. Experiments illustrate that the increase in the number of TDI stages and reduction in the column fixed pattern noise effectively improve the signal-to-noise ratio of particle defects without sacrificing the detecting efficiency.

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Section: Introductionmentioning

confidence: 99%

Balancing the Efficiency and Sensitivity of Defect Inspection of Non-Patterned Wafers with TDI-Based Dark-Field Scattering Microscopy

Yu,

Xu,

Wang

et al. 2024

Sensors

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“…1 Overall process window of a device layout may be limited by particularly sensitive critical pattern geometries, i.e. hotspots.…”

Section: Introduction and Conceptmentioning

confidence: 99%

A new paradigm for in-line detection and control of patterning defects

Hunsche¹,

Jochemsen²,

Jain³

et al. 2015

SPIE Proceedings

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With continuously shrinking design rules and corresponding low-k1 lithography, defectivity and yield are increasingly dominated by systematic patterning defects. The size of these yield-limiting defects is shrinking along with feature size, making their detection and verification more difficult. We discuss a novel, holistic approach to pattern defect detection and control, which integrates full chip layout analysis and hybrid wafer metrology data to predict wafer locations with highest probability for defect occurrence. We assess the various components of this flow by an experimental study on a 10 nm BEOL process at IMEC, using state-of-the-art negative tone development (NTD) and triple Litho-Etch patterning process. Downloaded From: http://proceedings.spiedigitallibrary.org/ on 05/19/2015 Terms of Use: http://spiedl.org/terms Proc. of SPIE Vol. 9424 94241B-2 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 05/19/2015 Terms of Use: http://spiedl.org/terms Proc. of SPIE Vol. 9424 94241B-8 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 05/19/2015 Terms of Use: http://spiedl.org/terms

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“…The machine vision systems include the following processes mostly: image acquisition, image processing, judgment and recognition, and automatic marking. The machine learning algorithms extract edge feature, surface texture and pattern information from the collected images, process and output the image recognition results, which are the core of machine vision systems [11]- [13].…”

Section: Introductionmentioning

confidence: 99%

A Light-Weighted CNN Model for Wafer Structural Defect Detection

Chen

Han

et al. 2020

IEEE Access

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Silicon wafer is the raw material of semiconductor chip. It is important and challenging to research a fast and accurate method of identifying and classifying wafer structural defects. To this end, we present a novel detection method in terms of the convolution neural networks (CNN), which achieve more than 99% detection accuracy. Due to the wafer images are not available by open datasets, a set of imaging acquisition system is designed to capture wafer images. Digital image preprocessing technology is utilized to split a wafer image into thousands of silicon grain images. The proposed model, called WDD-Net, uses depthwise separable convolutions and global average pooling to reduce parameters and calculations, adopts multiple 1 * 1 standard convolutions to increase the network depth. Specifically, two types of CNN models, VGG-16 and MobileNet-v2, are adopted for comparative analysis. Using the aforementioned three models, the comparative experiments are implemented on data sets that consisting of more than ten thousand grain images. The experimental results show that compared with VGG-16 and MobileNet-v2, the detection speed of the WDD-Net is 105.6FPS, which is 5 times faster. The model size of the WDD-Net is 307KB, which is much smaller than the other two. Furthermore, the WDD-Net directly completes the data collection and defect detection process through the local computing equipment, which is suitable for edge computing. INDEX TERMS Image classification, neural networks, semiconductor manufacturing, machine learning.

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Defect inspection strategies for 14 nm semiconductor technology

Cited by 10 publications

References 0 publications

Balancing the Efficiency and Sensitivity of Defect Inspection of Non-Patterned Wafers with TDI-Based Dark-Field Scattering Microscopy

Balancing the Efficiency and Sensitivity of Defect Inspection of Non-Patterned Wafers with TDI-Based Dark-Field Scattering Microscopy

A new paradigm for in-line detection and control of patterning defects

A Light-Weighted CNN Model for Wafer Structural Defect Detection

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