Defect printability of thin absorber mask in EUV lithography

Abstract

The effect of mask absorber thickness on defect printability in EUV lithography was studied. In case of very thin absorber, when used for EUVL mask, it became necessary to set specifications for mask defects for the manufacturability of ULSI devices because mask absorber thickness could impact defect printability. We prepared programmed mask defects of LR-TaBN absorber with various thicknesses. We then investigated defect printability of thin absorber mask with Small Field Exposure Tool (SFET) by comparing the data with simulation results.

Application of Extreme Ultraviolet Lithography to Test Chip Fabrication

“…PL-TEG mask consisted of a 51-nm-thick LR-TaBN absorber on a Cr buffer layer on the Si cap layer of a Mo/Si multilayer. 12,20) PL-TEG mask CD uniformity for 200 nm L&S patterns on a mask (Fig. 4) was obtained from data taken at 37 Â 15 sites.…”

“…7,8) The objectives of its use are to accelerate the development of resist materials and processes, to optimize the mask structure and materials, and to evaluate the exposure tool technology with regard to such things as imaging performance, stability, and the lifetimes of the optics and source components. [9][10][11][12] The objective of the use of EUV1 is to demonstrate that lithography integration is a viable path to making EUV lithography a practical production technology. [13][14][15] On the other hand, lithography is the key step in semiconductor manufacturing; and proof of manufacturability is the main focus of EUV lithography development.…”