Degradation of Oxide Properties Caused by Low-Level Metallic Contamination

Abstract

In this work SiO 2 on silicon was contaminated with metal-containing solutions after it was grown. Significant deleterious electrical effects are shown to develop following oxide surface contamination with part per billion, ppB, levels of metals from solution. The objective was to address the risk that unintentional contamination, such as may occur during routine manufacturing processes, posed to oxide electrical performance. Accordingly, high temperature or ion implantation-based contamination process environments, typical of previous studies, were not used in this work. Two low-energy methods were developed to introduce the contamination to the oxide and they are referred to as unintentional contamination mimic and plasma mimic processes, respectively. Equilibrium current density vs oxide stress field, J-E OX , capacitor measurements were used to assess the degradation in oxide quality caused by exposure to either cobalt, copper, nickel, or iron containing solutions. Cobalt was observed to act in a fashion different from other metals at low ppB contamination levels for capacitor structures, suggesting a different behavior of this metal when applied to oxide relative to the other metals considered. Further, a strong correlation is demonstrated between capacitor measurement results and noncontact oxide stress-induced-leakage-current, measurements that do not require capacitor fabrication.

Contaminação de lâminas de silício por metais durante a imersão em solução diluída de ácido fluorídrico ou de água deionizada contendo cloretos metálicos

“…demonstraram que a exposição de óxidos finos a soluções contendo água ultra pura e metais de transição tais como Co, Cu, Ni e Fe produzem dramáticas degradações nas propriedades dielétricas de tais óxidos. O Cu tem o maior impacto sobre a qualidade dielétrica seguido por Co, em seguida, Fe e, finalmente Ni, em ordem de gravidade (32) .…”

Low-Frequency Noise Assessment of CMOS Transistors with a Through-Silicon Via

“…For example, backside Cu contamination of the thinned stacked chip may impact on the transistor parameters or reliability (5)(6)(7). Copper atoms easily diffuse through SiO 2 and may create traps at the interface or in the oxide, which can degrade the gate oxide quality and breakdown (8)(9)(10)(11)(12)(13)(14)(15)(16)(17). Back-side gettering schemes, relying on the presence of back-side damage are generally helpful in the control of copper in-diffusion (18).…”