2012 13th Biennial Baltic Electronics Conference 2012
DOI: 10.1109/bec.2012.6376820
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Delay-fault run-time XOR-less aging detection unit using BRAM in modern FPGAs

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Cited by 7 publications
(3 citation statements)
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“…In addition, they can use only interconnect resources or minimal spare logic resources. In the most of cases, all the described solutions and proposed run-time XOR-less delay-fault and aging detectors [10] do not affect the original design the FPGA designs updated of the aging and the new reliability measurement units. …”
Section: Fpgas and Brams In Detailmentioning
confidence: 98%
“…In addition, they can use only interconnect resources or minimal spare logic resources. In the most of cases, all the described solutions and proposed run-time XOR-less delay-fault and aging detectors [10] do not affect the original design the FPGA designs updated of the aging and the new reliability measurement units. …”
Section: Fpgas and Brams In Detailmentioning
confidence: 98%
“…Pfeifer et al [59] presented an online delay-fault detection technique for combinatorial circuits. The authors used the D FFs at the input of on-chip BRAMs as SRs, which map the signals to memory rows to be analysed at a later time.…”
Section: B Shadow Registermentioning
confidence: 99%
“…This paper is focused on the low-cost 28 nm devices and their behaviour under extreme temperature conditions. It will be also an important contribution to the extension of the ideas introduced in [12], with direct application into the solutions mentioned in [11].…”
Section: Introductionmentioning
confidence: 98%