Delta-sigma ADC modulator for multibit data converters using passive adder entrenched second order noise shaping

Abstract

This paper introduces a multi-bit data converters (MDC) modulator of the 2nd order delta-sigma analog-to-digital converter use the passive adder proposed. The noise shaping quantizer can provide feedback that has generated quantization noise and perform additional shaping noise first-order by coupling noise method.Thus, two Integrator's with ring amplifier and the MDC is shaped by noise coupling quantizer know the 2nd-order noise coupled with somewhat of a DAC modulator. At a summing point, the inputs are summed and then filtered with a low pass filter. A cyclic second order response is generated with a data weighted averaging (DWA) technique in which the DACs ' outputs are limited to one of two states in the noise shaping responses. Mainly as a result of the harmonic distortion in circuits of amplifier. Transistor rate is equipped for the fully differential switched condenser integrator used, a comparator and DWA. The modulator with proposed DWA design, almost quarterly improved timing margin. A simulated SNDR of 92dB is obtained at 20 MHz sampling frequency; while a sinusoidal output of 4.112 dBFS is tested at 90µs besides 20 MHz as the bandwidth. The power consumption is 0.33 mW while the voltage of the supply is 1.2V.

Optimizing frequency synthesizer performance based on passive adder entrenched technique for 4G communication systems

“…In comparison to [10], [17] the suggested frequency synthesizer obtained the smallest area, power, and output frequency range in 0.23 mw and 57MHz process technology. We increase noise figure (14 rms mV) performance compared to [14]'s flying-adder structure by setting the worst case in the fractional section of the frequency control word. This technique also outperforms [26], [27]'s two-path PLL in 12.5 MHz bandwidth.…”

“…In the noise shaping replies, a data weighted averaging approach is employed to generate a cyclic second order response in which the DAC outputs are restricted to one of two states [12]. Abdalsatar [13] presented a 2nd-order noise coupling technique are used an integrated passive adder quantization noise shaping multiple description coding (MDC) of Δ-Σ modulator with two componentbased dynamic analog integrators and an embedded Δ-Σ-MDC quantizer with passive adder Two integrators made consisting of ring amplifiers are utilized for 2nd-order noise shaping [14]. The frequency synthesizer's PLL makes the frequency conversion more flexible and the output frequency more steady [15]; the module's thermal problem was also fixed by utilizing a thermistor and changing the operation mode [16].…”