Demand-Aware Power Management for Power-Constrained HPC Systems

Cao, Thang; He, Yuan; Kondo, Masaaki

doi:10.1109/ccgrid.2016.25

Cited by 22 publications

(14 citation statements)

References 16 publications

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“…Sarood et al [48] use performance modeling to increase job throughput in power constrained systems. A power management of overprovisioned systems has also been studied by Patki et al [12,43]. Unlike our work, all sockets are viewed as homogeneous in terms of power consumption, which can lead to suboptimal scheduling decisions.…”

Section: Power-aware Budgeting and Schedulingmentioning

confidence: 93%

“…SLURM extended policy implements SLURM's logic in our simulator, with the addition of power-awareness and power backfilling. SLURM+PE and SLURM+PEVA employ state-of-the-art features of proposed power-aware policies [12,22,43], while SLURM+IVP demonstrates the ideal scenario, where prediction is 100% accurate. The evaluation is done based on a simulator, as described in Section 4.1, by feeding it performance and power traces from actual executions on the Quartz cluster.…”

Section: Variability-aware Scheduling Evaluationmentioning

confidence: 99%

“…Either across nodes or within a shared-memory node, both job and runtime schedulers deal with the resource allocation problem, albeit at different levels, offering opportunities to manage power consumption. Indeed, examples of power-aware systems that offer solutions either at the job scheduling [12,16,19,22] or at runtime system [13,22,27,53,54] levels already exist in the literature.…”

Section: Introductionmentioning

confidence: 99%

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Power efficient job scheduling by predicting the impact of processor manufacturing variability

Chasapis

Moretó

Schulz

et al. 2019

Proceedings of the ACM International Conference on Supercomputing

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Modern CPUs suffer from performance and power consumption variability due to the manufacturing process. As a result, systems that do not consider such variability caused by manufacturing issues lead to performance degradations and wasted power. In order to avoid such negative impact, users and system administrators must actively counteract any manufacturing variability. In this work we show that parallel systems benefit from taking into account the consequences of manufacturing variability when making scheduling decisions at the job scheduler level. We also show that it is possible to predict the impact of this variability on specific applications by using variabilityaware power prediction models. Based on these power models, we propose two job scheduling policies that consider the effects of manufacturing variability for each application and that ensure that power consumption stays under a systemwide power budget. We evaluate our policies under different power budgets and traffic scenarios, consisting of both singleand multi-node parallel applications, utilizing up to 4096 cores in total. We demonstrate that they decrease job turnaround time, compared to contemporary scheduling policies used on production clusters, up to 31% while saving up to 5.5% energy. CCS CONCEPTS • Computer systems organization → Parallel architectures; • Hardware → Power estimation and optimization;

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Section: Power-aware Budgeting and Schedulingmentioning

confidence: 93%

Section: Variability-aware Scheduling Evaluationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Power efficient job scheduling by predicting the impact of processor manufacturing variability

Chasapis

Moretó

Schulz

et al. 2019

Proceedings of the ACM International Conference on Supercomputing

View full text Add to dashboard Cite

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“…Power-performance optimization methodologies typically aim at maximizing application performance while satisfying given constraints (power budget, energy consumption, application execution deadline, etc.). Most of them are mainly based on "power-shifting" among hardware components [9,13,19] or among applications/jobs [3,17,20,24,26]. Usually we have a large number of jobs running on a HPC system, and hence optimizing power-performance in both intraand inter-application cases is important.…”

Section: Power-performance Optimizationmentioning

confidence: 99%

“…Cao et al developed a demand-aware power management approach [24]. With this approach, job scheduler allocates power budget and hardware resources to run jobs considering their demands and the total system power consumption.…”

Section: Power-performance Optimizationmentioning

confidence: 99%

A Power Management Framework with Simple DSL for Automatic Power-Performance Optimization on Power-Constrained HPC Systems

Wada

Cao

et al. 2018

Supercomputing Frontiers

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To design exascale HPC systems, power limitation is one of the most crucial and unavoidable issues; and it is also necessary to optimize the power-performance of user applications while keeping the power consumption of the HPC system below a given power budget. For this kind of power-performance optimization for HPC applications, it is indispensable to have enough information and good understanding about both the system specifications (what kind of hardware resources are included in the system, which component can be used as a "power-knob", how to control the power-knob, etc.) and user applications (which part of the application is CPU-intensive, memory-intensive, and so on). Because this situation forces both the users and administrators of power-constrained HPC systems pay much effort and cost, it has been highly demanded to realize a simple framework to automate a power-performance optimization process, and to provide a simple user interface to the framework. To tackle these concerns, we propose and implement a versatile framework to help carry out power management and performance optimization on power-constrained HPC systems. In this framework, we also propose a simple DSL as an interface to utilize the framework. We believe this is a key to effectively utilize HPC systems under the limited power budget.

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Footprint-Aware Power Capping for Hybrid Memory Based Systems

Arima

Hanawa

Trinitis

et al. 2020

Lecture Notes in Computer Science

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High Performance Computing (HPC) systems are facing severe limitations in both power and memory bandwidth/capacity. By now, these limitations have been addressed individually: to improve performance under a strict power constraint, power capping, which sets power limits to components/nodes/jobs, is an indispensable feature; and for memory bandwidth/capacity increase, the industry has begun to support hybrid main memory designs that comprise multiple different technologies including emerging memories (e.g., 3D stacked DRAM or Non-Volatile RAM) in one compute node. However, few works look at the combination of both trends. This paper explicitly targets power managements on hybrid memory based HPC systems and is based on the following observation: in spite of the system software's efforts to optimize data allocations on such a system, the effective memory bandwidth can decrease considerably when we scale the problem size of applications. As a result, the performance bottleneck component changes in accordance with the footprint (or data) size, which then also changes the optimal power cap settings in a node. Motivated by this observation, we propose a power management concept called footprint-aware power capping (FPCAP) and a profile-driven software framework to realize it. Our experimental result on a real system using HPC benchmarks shows that our approach is successful in correctly setting power caps depending on the footprint size while keeping around 93/96% of performance/power-efficiency compared to the best settings.

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Demand-Aware Power Management for Power-Constrained HPC Systems

Cited by 22 publications

References 16 publications

Power efficient job scheduling by predicting the impact of processor manufacturing variability

Power efficient job scheduling by predicting the impact of processor manufacturing variability

A Power Management Framework with Simple DSL for Automatic Power-Performance Optimization on Power-Constrained HPC Systems

Footprint-Aware Power Capping for Hybrid Memory Based Systems

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