Demonstration of Low Power 3-bit Multilevel Cell Characteristics in a TaO_{<italic>x</italic>}-Based RRAM by Stack Engineering

Abstract

Multilevel cell (MLC) storage technology is attractive in achieving ultrahigh density memory with low cost. In this letter, we have demonstrated 3-bit per cell storage characteristics in a TaO x -based RRAM. By analyzing the key requirements for MLC operation mainly the switching uniformity and stability of resistance levels, an engineered stack based on thermodynamics in top electrode/(vacancy reservoir/defect control layer)/switching layer/bottom electrode structure was designed. In the optimized stack with ∼10-nm Ta layer incorporated at W/TaO x interface, seven low resistance state levels with same high resistance state were obtained by controlling the switching current down from 30 µA enabling low power 3-bit storage in contrast to the control device which shows 2-bit MLC with resistance saturation. The improved switching and MLC behavior is attributed to the minimized stochastic nature of set/reset operations due to filament confinement by favorable electric field generation and formation of thin but highly conductive filament which is confirmed electrically. Index Terms-Multi-level cell, RRAM, TaO x , vacancy reservoir, defect engineering, dense filament.

The role of nitrogen doping in ALD Ta2O5 and its influence on multilevel cell switching in RRAM

“…It has been shown in the literature 3,4 and is shown in this work that atomic doping can improve both requirements. Evolution of a conductive filament and its rupture and restoration have been studied by various analytical and numerical models [10][11][12][13][14] We have previously reported the properties of Ovac in the λ phase of Ta2O5 crystal 15 and in the amorphous Ta2O5 network 16 through sX density functional simulations.…”

“…In this way, the 2-fold Ovac in the amorphous Ta2O5 network is nullified or cancelled by the presence of two N atoms. The neutralization of the defect states associated with the Ovac eliminates the excess conductive paths 4 and reduces the numbers or densities of potential filaments.…”

“…It has been reported that the variability of resistance associated with a CF depends on the conductive filament size and also the oxygen vacancy concentration 3 . The multilevel switching is commonly achieved by adjusting the LRS current by changing the compliance during the set cycle [2][3][4][5] . Less common is to change the HRS current by changing the maximum voltage during the reset 5,6 .…”

“…In both methods, achieving more than 2-bit storage (4 distinctive states) is challenging due to the variability of states and small switching memory window. 3-bit MLC switching has only been reported on LRS current varied by the set current compliance method 2,4 . However, the MLC performance reported was on small area (250 nm diameter) devices which allow small set currents down to 10 μA and enhanced stability of states.…”

“…The LRS current is governed by metallic conduction which depends on the conductivity and average radius of the filament. Furthermore, a reduction in Ovac, in this case by N doping, increases the conductivity of the filament by eliminating the excess conductive paths which results in a denser localized conductive filament 4 with smaller inter-atomic distance between O vacancies. Reduction of Ovac also reduces the average radius of the filament, resulting in reduction in LRS current.…”