Demonstration of production readiness of an immersion lithography cell

Beccalli, Alberto; Canestrari, Paolo; Goeke, Mark; Kanaoka, Masashi; Kandraschow, Helmut; Kuroda, Takuya; Simone, Danilo De; Piacentini, Paolo; Padovani, M.; Piazza, Paolo; Rossi, Alessandro

doi:10.1117/12.779150

Cited by 2 publications

(2 citation statements)

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“…Direct interfacing allows for a so-called soak treatment, wherein wafers are treated with DI water rinse to remove remaining water droplets and moisture just after exposure and before post-exposure bake. It is known that this treatment decreases the amount of pattern expansions up to 80% [17], [24], [25]. That does not come as a surprise since we explained in section IIIA that pattern expansions are caused by interaction of water droplets and the stack, and those water droplets are removed by this soak treatment.…”

Section: B Yield Estimationsmentioning

confidence: 81%

Improving Equipment Defectivity Specifications Through Chip Yield Modeling: A Case Study for Immersion Lithography

Boogaard

Smith

Mouraille

et al. 2013

IEEE Trans. Semicond. Manufact.

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Semiconductor equipment suppliers are asked to build tools that can operate almost continuously. Once such a reliable tool is developed, defect data collection, understanding, and reduction become increasingly important since the tool has to manufacture reliable (layers of) semiconductor devices that scarcely fail. At this stage, semiconductor equipment suppliers could benefit from the concepts of chip yield modeling, because it directly relates their defect data to the yield of semiconductor devices. We present a case study in which we estimate the yield impact of defects related to immersion photolithography scanners. Defects were separated into various classes, and the size distributions of those classes were measured. Given a circuit's critical area, forecasting of the yield for any defect class becomes straightforward, and also yield predictions can be made for future technology nodes, resulting in the optimal choice of yieldenhancing strategies.

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Section: B Yield Estimationsmentioning

confidence: 81%

Improving Equipment Defectivity Specifications Through Chip Yield Modeling: A Case Study for Immersion Lithography

Boogaard

Smith

Mouraille

et al. 2013

IEEE Trans. Semicond. Manufact.

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“…Materials patterning through nonconventional lithography can reduce the cost of patterning fine structures when compared to traditional nanofabrication techniques such as photolithography . The current state-of-the-art in lithography couples 193 nm light with immersion lithography and allows for patterning of sub-45 nm features . These advanced developments require very costly instrumentation and have difficulty providing throughput commensurate industrial demands .…”

Section: Introductionmentioning

confidence: 99%

Grafted Functional Polymer Nanostructures Patterned Bottom-Up by Colloidal Lithography and Initiated Chemical Vapor Deposition (iCVD)

2009

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Colloidal lithography, a popular inexpensive alternative to conventional lithography, uses two−dimensional self-assembled monolayer arrays of colloidal nanoparticles as a lithographic template. Combined with initiated chemical vapor deposition (iCVD), which offers unprecedented opportunity for producing grafted polymeric layers, this work demonstrates a generic “bottom-up” process as an inexpensive, simple, and environmentally friendly technique for creating robust well-ordered arrays of functional patterned polymeric nanostructures up to 500 nm in height. These grafted “nanobowl” patterns are produced for a broad material set of functional organic, fluorinated, and silicon containing polymers. These polymers fully retain the organic functionality of their monomeric precursors, are free of wetting defects, and are robustly tethered to the underlying substrate as shown by their ability to withstand aggressive solvent. Furthermore, using this method we pattern a novel low dielectric constant polymer down to 25 nm without the need for environmentally harmful solvents.

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Demonstration of production readiness of an immersion lithography cell

Cited by 2 publications

References 0 publications

Improving Equipment Defectivity Specifications Through Chip Yield Modeling: A Case Study for Immersion Lithography

Improving Equipment Defectivity Specifications Through Chip Yield Modeling: A Case Study for Immersion Lithography

Grafted Functional Polymer Nanostructures Patterned Bottom-Up by Colloidal Lithography and Initiated Chemical Vapor Deposition (iCVD)

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