Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs

Lai, Longqiang; Li, Xueqing; Fu, Yushen; Liu, Yongpan; Yang, Huazhong

doi:10.1109/tcsi.2018.2866819

Cited by 31 publications

(13 citation statements)

References 38 publications

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“…These two cases are treated in more detail later in this section. Substituting for Z out j j in (36), and solving for f sig ¼ f s =2, with f s as 1=2pR L C L , q G j j is reduced to.…”

Section: Linearity-limited Boundmentioning

confidence: 99%

Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters

Chacon

Wikner

Svensson

et al. 2022

Analog Integr Circ Sig Process

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In this paper, an attempt to estimate energy consumption bounds versus signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) in CMOS current-steering digital-to-analog converters is presented. A theoretical analysis is derived, including the design corners for noise, speed and linearity for the mixed-signal domain. The study is validated by comparing the theoretical results with published measured data. As result it serves as a design reference to aim for minimum energy consumption. It is found that for an equivalent number of bits (ENOBs), the noise-bound grows at a rate of 22ENOB, whereas the speed-bound increases by 2ENOB−2 and is dependent on device dimensions. Therefore, as the technology scales down, the noise bound will dominate, which is observed for an estimated SNR of about 40 dB in 65 nm CMOS process. The linearity bound is derived from an analysis based on the assumption of limited output impedance, where it is found to be dependent on the device dimensions and increase at a rate of 2ENOB−1. The observations show that it is possible to achieve less energy consumption in all the design corners for different SNR and SFDR specifications within the Nyquist frequency, fs/2.

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“…These two cases are treated in more detail later in this section. Substituting for Z out j j in (36), and solving for f sig ¼ f s =2, with f s as 1=2pR L C L , q G j j is reduced to.…”

Section: Linearity-limited Boundmentioning

confidence: 99%

Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters

Chacon

Wikner

Svensson

et al. 2022

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

show abstract

“…The ideal analogue switch has no on-resistance, infinite off impedance and zero delay, and it can handle large signals and common mode voltages [4]. Realistic CMOS analogue switches do not meet these criteria.…”

Section: Switch Designmentioning

confidence: 99%

A 12-bit Digital-to-Analog Converter for Current Distribution Type

Dai

Wang

et al. 2022

J. Phys.: Conf. Ser.

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Sensors have a wide range of applications in environmental monitoring, for example, as temperature transmitters in industrial control processes. In order to reduce the chip area and improve the digital-to-analogue conversion accuracy, large loads are driven. This study proposes a current-shunted DAC for sensor interfaces with an R-2R structure, using a Class-AB amplifier to buffer or amplify the signal. Spectre simulation shows that the DAC has a current consumption of 63uA when the supply voltage and reference voltage are 1.8V and can drive a 15pF capacitive load.

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“…In Ref. [67], a time-relaxed interleaving return-to-zero DEM (TRI-DEMRZ) technique was proposed to implement a DEM decoder with enough randomization and less code-dependent switching glitches in a 14-bit 1GS/s DAC. Ref.…”

Section: Dynamic Error Reducing Techniquesmentioning

confidence: 99%

A survey of high-speed high-resolution current steering DACs

Li¹,

Zhou²

2020

J. Semicond.

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Digital to analog converters (DAC) play an important role as a bridge connecting the analog world and the digital world. With the rapid development of wireless communication, wideband digital radar, and other emerging technologies, better performing high-speed high-resolution DACs are required. In those applications, signal bandwidth and high-frequency linearity often limited by data converters are the bottleneck of the system. This article reviews the state-of-the-art technologies of high-speed and high-resolution DACs reported in recent years. Comparisons are made between different architectures, circuit implementations and calibration techniques along with the figure of merit (FoM) results.

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Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs

Cited by 31 publications

References 38 publications

Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters

Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters

A 12-bit Digital-to-Analog Converter for Current Distribution Type

A survey of high-speed high-resolution current steering DACs

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