Design, Analysis, and Application of Flipped Product Chaotic System

Hasan, Sakib; Paul, Partha Sarathi; Dhungel, Anurag; Sadia, Maisha; Hossain, Md Razuan

doi:10.1109/access.2022.3225661

Cited by 2 publications

(1 citation statement)

References 44 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…According to Ross Freeman, one of the founders of Xilinx and the inventor of the FPGA, for many applications, flexibility and customizability are attractive features if implemented properly. When Xilinx launched its third-generation FPGA product, the XC4000 series, in 1991, people began to seriously consider programmable technology [2]. Perhaps since then, the shift to the latest semiconductor processes has been inexorable.…”

Section: Fpga and Vhdlmentioning

confidence: 99%

Design of electronic clock and stopwatch based on FPGA and VHDL language

Kang

2023

J. Phys.: Conf. Ser.

View full text Add to dashboard Cite

This paper designs a simple system that can include electronic clock and stopwatch based on FPGA(Field Programmable Gate Array) and VHDL(Very-High-Speed Integrated Circuit Hardware Description Language). The first chapter briefly introduces the research background. The second chapter introduces the theoretical basis of digital circuits and the hardware and software platform used in this paper. In the third chapter, the design of each sub-module of the system and the overall design of the system are carried out. This chapter is the core chapter of this article, which describes the functions of the module and explains the input and output ports. In this chapter, a core point of digital circuit design is reflected: combining modules that realize simple functions into modules that can realize complex functions. And integrate sub-modules that realize similar functions into a top-level module. The fourth chapter is the logic synthesis of the circuit. The fourth chapter shows the simulation of the core module function and the simulation of the system output. The conclusion section summarizes the interesting parts of the design of this paper.

show abstract

Section: Fpga and Vhdlmentioning

confidence: 99%

Design of electronic clock and stopwatch based on FPGA and VHDL language

Kang

2023

J. Phys.: Conf. Ser.

View full text Add to dashboard Cite

show abstract

Self-Parameterized Chaotic Map for Low-Cost Robust Chaos

Paul

Dhungel

Sadia

et al. 2023

JLPEA

View full text Add to dashboard Cite

This paper presents a general method, called “self-parameterization”, for designing one-dimensional (1-D) chaotic maps that provide wider chaotic regions compared to existing 1-D maps. A wide chaotic region is a desirable property, as it helps to provide robust performance by enlarging the design space in many hardware-security applications, including reconfigurable logic and encryption. The proposed self-parameterization scheme uses only one existing chaotic map, referred to as the seed map, and a simple transformation block. The effective control parameter of the seed map is treated as an intermediate variable derived from the input and control parameter of the self-parameterized map, under some constraints, to achieve the desired functionality. The widening of the chaotic region after adding self-parameterization is first demonstrated on three ideal map functions: Logistic; Tent; and Sine. A digitized version of the scheme was developed and realized in a field-programmable gate array (FPGA) implementation. An analog version of the proposed scheme was developed with very low transistor-count analog topologies for hardware-constrained integrated circuit (IC) implementation. The chaotic performance of both digital and analog implementations was evaluated with bifurcation plots and four established chaotic entropy metrics: the Lyapunov Exponent; the Correlation Coefficient; the Correlation Dimension; and Approximate Entropy. An application of the proposed scheme was demonstrated in a random number generator design, and the statistical randomness of the generated sequence was verified with the NIST test.

show abstract

Design, Analysis, and Application of Flipped Product Chaotic System

Cited by 2 publications

References 44 publications

Design of electronic clock and stopwatch based on FPGA and VHDL language

Design of electronic clock and stopwatch based on FPGA and VHDL language

Self-Parameterized Chaotic Map for Low-Cost Robust Chaos

Contact Info

Product

Resources

About