2022
DOI: 10.1016/j.compeleceng.2022.107701
|View full text |Cite
|
Sign up to set email alerts
|

Design, analysis and implementation of electronically interfaced photovoltaic system using ARM Cortex-M4 microcontroller

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2

Citation Types

0
2
0

Year Published

2022
2022
2024
2024

Publication Types

Select...
6
1

Relationship

0
7

Authors

Journals

citations
Cited by 11 publications
(2 citation statements)
references
References 10 publications
0
2
0
Order By: Relevance
“…The drawbacks of a type I SOGI are addressed by Shi et al (2022) by creating an enhanced type II SOGI, which is vulnerable to interference from the high-frequency component, by creating a negative feedback channel for the DC component. A synchronous reference frame phase-locked loop (SRF-PLL) can lock the phase quickly and accurately under an ideal voltage environment, but the SRF-PLL encounters inaccurate phase-locking in the presence of imbalances such as distortions and harmonics in the power grid (Kumar et al, 2022;Pan et al, 2023). To overcome the above defects, experts proposed a decoupled double synchronous reference frame PLL (DDSRF-PLL) (Achlerkar and Panigrahi, 2022;Su et al, 2022), and the low bandwidth filter in this phase-locked loop still causes some delay to the system.…”
Section: Introductionmentioning
confidence: 99%
“…The drawbacks of a type I SOGI are addressed by Shi et al (2022) by creating an enhanced type II SOGI, which is vulnerable to interference from the high-frequency component, by creating a negative feedback channel for the DC component. A synchronous reference frame phase-locked loop (SRF-PLL) can lock the phase quickly and accurately under an ideal voltage environment, but the SRF-PLL encounters inaccurate phase-locking in the presence of imbalances such as distortions and harmonics in the power grid (Kumar et al, 2022;Pan et al, 2023). To overcome the above defects, experts proposed a decoupled double synchronous reference frame PLL (DDSRF-PLL) (Achlerkar and Panigrahi, 2022;Su et al, 2022), and the low bandwidth filter in this phase-locked loop still causes some delay to the system.…”
Section: Introductionmentioning
confidence: 99%
“…A grid interfaced solar photovoltaic (GIPV) system has been developed by Kumar et al. [20] based on an ARM Cortex‐M4 core. The ARM core controls other peripheral entities such as the voltage source converter and the DC‐DC boost converter to realise the interface between the solar grid and PC.…”
Section: Introductionmentioning
confidence: 99%