Design and analysis of 28 GHz CMOS low power LNA with 6.4 dB gain variability for 5G applications

Abstract

A 28 GHz two stage low noise amplifier (LNA) is proposed with envelope detection technique for power reduction (21.62%) and tunable negative feedback capacitor for gain variation in 40 nm CMOS technology. The envelope detection circuit turn‐on the second half of the LNA by the RF signal input received at the first stage. The default gain is increased (31.53%) by the tunable negative feedback capacitor circuit of the LNA with the control voltage from 0 to 1 V. In addition, 6.22 GHz of bandwidth is achieved with the tunable gain from 20.3 dB to 26.7 dB. The first stage of the LNA is designed with the inductive source degeneration for the noise reduction, and the multiple‐gate topology is involved in the second stage to improve the linearity. The third‐order input intercept point and the noise figure of the LNA are −7 dBm and 2.86 dB, respectively. When the second stage is turned‐on and turned‐off the LNA consumes 7.4 mW and 5.8 mW of power, respectively, from the 1 V supply. The proposed LNA requires 0.19 mm2 of core area. The performance of the LNA under process corner variation and temperature variation are analyzed.

Catalyzing satellite communication: A 20W Ku-Band RF front-end power amplifier design and deployment

“…Gain and gain flatness. In the design of low-noise amplifier circuits, three power gains are commonly used: transmission power gain G t , operating power gain G p , and utilization power gain G a [62]. The relationship between the three power gains is as follows.…”