Design and analysis of a high-speed sense amplifier for single-transistor nonvolatile memory cells

This paper presents a fully symmetrical sense amplifier topology for advanced non-volatile memories. The proposed structure ensures zero systematic offset, together with adequate rejection of disturbs coming from capacitive coupling with noisy substrate, power supply, and ground. The presented topology has been designed for phase change memories, however, it is also suitable for use in other non-volatile storage devices such as magnetic RAMs and Flash memories. Experimental results on sensing time, offset, and sensitivity demonstrated the effectiveness of the proposed scheme.

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A fully symmetrical sense amplifier for non-volatile memories

Bedeschi

Bonizzoni

Khouri

et al.

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

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Design and analysis of a high-speed sense amplifier for single-transistor nonvolatile memory cells

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References 6 publications

A fully symmetrical sense amplifier for non-volatile memories

A fully symmetrical sense amplifier for non-volatile memories

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