Design and Analysis of a W-Band SiGe Direct-Detection-Based Passive Imaging Receiver

Gilreath, Leland; Jain, Vipul; Heydari, Payam

doi:10.1109/jssc.2011.2162792

Cited by 96 publications

(65 citation statements)

References 13 publications

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“…Power detectors with LNAs have been demonstrated in CMOS technology up to W-band [62,63], achieving a noise equivalent power (NEP) as low as 36 fW/ √ H z with around 110 mW DC power consumption [62]. The HBT square-law detectors with an LNA pre-amplification have also been used up to D-band [64][65][66][67] with NEPs as low as 14 fW/ √ H z and a DC power consumption of about 90 mW [67]. Beyond the technology f T /f max , it is no longer possible to design LNAs.…”

Section: Arrays Of Thz Direct Detector In Silicon Technologiesmentioning

confidence: 99%

THz Direct Detector and Heterodyne Receiver Arrays in Silicon Nanoscale Technologies

Grzyb¹,

Pfeiffer²

2015

J Infrared Milli Terahz Waves

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The main scope of this paper is to address various implementation aspects of THz detector arrays in the nanoscale silicon technologies operating at room temperatures. This includes the operation of single detectors, detectors operated in parallel (arrays), and arrays of detectors operated in a video-camera mode with an internal reset to support continuous-wave illumination without the need to synchronize the source with the camera (no lock-in receiver required). A systematic overview of the main advantages and limitations in using silicon technologies for THz applications is given. The on-chip antenna design challenges and co-design aspects with the active circuitry are thoroughly analyzed for broadband detector/receiver operation. A summary of the state-of-the-art arrays of broadband THz direct detectors based on two different operation principles is presented. The first is based on the non-quasistatic resistive mixing process in a MOSFET channel, whereas the other relies on the THz signal rectification by nonlinearity of the base-emitter junction in a high-speed SiGe heterojunction bipolar transistor (HBT) . For the MOSFET detector arrays implemented in a 65 nm bulk CMOS technology, a state-of-the-art optical noise equivalent power (NEP) of 14 pW/ √ H z at 720 GHz was measured, whereas for the HBT detector arrays in a 0.25 μm SiGe process technology, an optical NEP of 47 pW/ √ H z at 700 GHz was found. Based on the implemented 1k-pixel CMOS camera with an average power consumption of 2.5μW/pixel, various design aspects specific to video-mode operation are outlined and co-integration issues with the readout circuitry are analyzed. Furthermore, a single-chip 2 × 2 array of heterodyne receivers for multi-color active imaging in a 160-1000 GHz band is presented with a Janusz Grzyb J Infrared Milli Terahz Waves well-balanced NEP across the operation bandwidth ranging from 0.1 to 0.24 fW/Hz (44.1-47.8 dB single-sideband NF) and an instantaneous IF bandwidth of 10 GHz. In its present implementation, the receiver RF bandwidth is not continuously covered but divided into six bands centered around 165, 330, 495, 660, 820, and 990 GHz.

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Section: Arrays Of Thz Direct Detector In Silicon Technologiesmentioning

confidence: 99%

THz Direct Detector and Heterodyne Receiver Arrays in Silicon Nanoscale Technologies

Grzyb¹,

Pfeiffer²

2015

J Infrared Milli Terahz Waves

View full text Add to dashboard Cite

show abstract

“…Each on-chip antenna is designed as a slot bowtie structure with an area of 500×900μm 2 . On the lowest level metal, a GND shield with narrow slots has been placed below the antenna to decrease leakage into the lossy substrate, thus improving the antenna radiation efficiency.…”

Section: 2mentioning

confidence: 99%

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mentioning

confidence: 99%

A 93-to-113GHz BiCMOS 9-element imaging array receiver utilizing spatial-overlapping pixels with wideband phase and amplitude control

Caster

Gilreath

Pan

et al. 2013

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

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Benefiting from aggressive feature size scaling, silicon technologies have recently shown the capability of implementing W-band imaging receivers with an image resolution of 1.5mm and temperature resolutions of less than 0.5K [1][2][3][4]. This paper extends the capability of an imaging array receiver by improving image resolution using the novel concept of spatial-overlapping sub-arrays and enhancing image capture time using a phased-array within an imaging array receiver (RX). Specifically, the design and implementation of a BiCMOS 9-element array RX consisting of four 2×2 overlapping sub-arrays is presented. The RF-path-sharing between neighboring sub-arrays leads to a reduction in the chip area by 40% as compared to a conventional imaging array consisting of four 2×2 non-overlapping sub-arrays, while improving the RX's spatial resolution due to the higher sub-array density. Each 2×2 sub-array in this imaging array RX forms a pixel (Fig. 8.5.1).

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“…To be able to increase the integration level and also reduce the cost some highly integrated silicon based radio frequency integrated circuit (RFIC) W-band Dicke switched receivers were previously presented [4][5][6]. The overall noise figure (NF) of those radiometer front-ends is, however, around 10 dB or higher.…”

Section: Introductionmentioning

confidence: 99%

“…13 2 Component requirements for a W-band passive imaging application A W-band passive imager works at stand-off distances (2-20 m) to detect objects hidden under clothing for security screening purposes (concealed weapons and explosives detection). Such a radiometric system is characterised by its thermal resolution or noise equivalent temperature difference (NETD) which is given by [4][5][6] …”

Section: Introductionmentioning

confidence: 99%

SiGe BiCMOS high‐gain and wideband differential intermediate frequency amplifier for W‐band passive imaging single‐chip receivers

Reyaz

Malmqvist

Gustafsson

et al. 2015

IET Microwaves, Antennas & Propagation

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This study presents the results of a high-gain and wideband differential intermediate frequency (IF) amplifier circuit design for a W-band passive imaging single-chip (down-conversion) receiver front-end. The cascaded two-stage IF amplifier was fabricated in a 0.13 μm SiGe BiCMOS process technology with 300 GHz/500 GHz f T /f max . In total six on-chip inductors are used in the input, output and inter-stage matching networks which enable relatively broadband RF properties together with a compact circuit size for the IF amplifier (the die area is 0.27 mm 2 incl. RF and DC pads). The broadband SiGe amplifier has a measured gain of 10-19.5 dB at 2-37 GHz (|s 11 | and |s 22 | ≤ −10 dB at 7-40 GHz and 8-35 GHz, respectively), noise figure of 6.3-8.0 dB at 2-26 GHz and output third order intercept points of 7-17 dBm at 1-40 GHz (the DC power consumption is 122 mW). To the authors' best knowledge, this work reports a first-time realisation of a differential IF amplifier made in a 0.13 μm SiGe BiCMOS technology that achieves such wideband impedance matching together with a high gain and reasonably low noise properties over a wide instantaneous bandwidth (|s 21 | = 15-19.5 dB at 3-26 GHz).

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Design and Analysis of a W-Band SiGe Direct-Detection-Based Passive Imaging Receiver

Cited by 96 publications

References 13 publications

THz Direct Detector and Heterodyne Receiver Arrays in Silicon Nanoscale Technologies

THz Direct Detector and Heterodyne Receiver Arrays in Silicon Nanoscale Technologies

A 93-to-113GHz BiCMOS 9-element imaging array receiver utilizing spatial-overlapping pixels with wideband phase and amplitude control

SiGe BiCMOS high‐gain and wideband differential intermediate frequency amplifier for W‐band passive imaging single‐chip receivers

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