Design and analysis of energy efficient semi-junctionless n<sup>+</sup>n<sup>+</sup>p heterojunction p-channel tunnel field effect transistor

Ahangari, Zahra

doi:10.1088/2053-1591/ab07cb

Cited by 8 publications

(4 citation statements)

References 16 publications

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“…As the conduction current results from the tunnelling of electrons at the source-channel interface [8], enhancing the value of I ON in a TFET remains a major challenge. Numerous engineering techniques such as multi-gate TFET technology [9][10][11][12], high-k dielectric materials [13], heterojunctionbased structures [14][15][16][17], source pocket techniques [18][19][20] and junction-less and charge plasma concept-based devices [21][22][23][24] have been proposed to boost the value of the drain current. The source material engineering (SME) technique, utilized to enhance the performance of TFETs, involves the formation of a heterojunction at the source-channel interface by replacing the silicon of the source region by other materials (Ge, InAs and Group III-V materials), and has been investigated thoroughly in the literature [10,[14][15][16][17].…”

Section: Introductionmentioning

confidence: 99%

“…Numerous engineering techniques such as multi-gate TFET technology [9][10][11][12], high-k dielectric materials [13], heterojunctionbased structures [14][15][16][17], source pocket techniques [18][19][20] and junction-less and charge plasma concept-based devices [21][22][23][24] have been proposed to boost the value of the drain current. The source material engineering (SME) technique, utilized to enhance the performance of TFETs, involves the formation of a heterojunction at the source-channel interface by replacing the silicon of the source region by other materials (Ge, InAs and Group III-V materials), and has been investigated thoroughly in the literature [10,[14][15][16][17]. Implementation of magnesium silicide (p-type Mg 2 Si) as a source material has previously been examined by our research group and the results revealed the superiority of Mg 2 Si source double gate TFETs (DG-TFETs) over conventional Si source DG-TFETs with reference to enhanced transfer characteristics and better performance parameters such as a high I ON and I ON /I OFF ratio and low threshold voltage (V th ) and SS [25].…”

Section: Introductionmentioning

confidence: 99%

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A novel source material engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications

Dassi

Madan

Pandey

et al. 2020

Semicond. Sci. Technol.

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Tunnel field effect transistors (TFETs) have proved their potential for many possible electronic circuit applications. However, with the variety of TFET structures being worked upon it has been an unresolved challenge to optimize them for the applications to which they are best suited. In this paper we present a detailed comparative analysis of the linearity distortion and the radiofrequency (RF) performance parameters of a proposed heterojunction Mg2Si source double gate TFET (HMSDG-TFET) and a conventional homojunction Si source DG-TFET (SSDG-TFET). A source material engineering scheme is utilized to implement a staggered type 2 heterojunction at the source–channel junction by replacing the source material with Mg2Si (a low band gap material) to enhance the ON current (2.5 × 10–4 A µm−1), reduce the threshold voltage (0.26 V) and achieve a steeper subthreshold swing (10.05 mV decade−1). For linearity and distortion analysis, the figure of merit (FOM)-like higher-order transconductances, second- and third-order voltage intercepts, third-order intercept point, third-order intermodulation distortion, zero crossover point, 1 dB compression point, second-order harmonic distortion, third order harmonic distortion and total harmonic distortion have been examined. To portray the possible application of devices under consideration for RF integrated circuit applications, both structures are investigated for RF FOMs such as power gains, cutoff frequency (fT), maximum oscillation frequency (F max) and admittance parameters. Investigations carried out using a Silvaco ATLAS device simulator tool revealed that with fT approximately three orders higher (0.49 THz) and F max approximately two orders higher (0.9 THz) than that of a SSDG-TFET, the HMSDG-TFET is an appropriate candidate for use in high-frequency, high-linearity, low-distortion and low-power analog/RF applications.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A novel source material engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications

Dassi

Madan

Pandey

et al. 2020

Semicond. Sci. Technol.

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“…Source material engineering (SME) is one such technique that is implemented to enhance the performance of TFET by the formation of a heterojunction at the tunneling junction, by replacing the silicon of source region with other low bandgap materials (Ge, InAs and group III-V). The same has been investigated thoroughly in literature [8,[12][13][14][15]. In comparison to a Si source, magnesium silicide (Mg 2 Si) source with low energy bandgap (0.77 eV) and a low electron affinity (3.59 eV) forms a staggered type II heterojunction due to which, inter-band tunneling width reduces leading to an increase in BTBT rate and consequently increase in the I ON [16][17][18].…”

Section: Introductionmentioning

confidence: 99%

Impact of interfacial charges on analog and RF performance of Mg2Si source heterojunction double-gate tunnel field effect transistor

Dassi

Madan

Pandey

et al. 2021

J Mater Sci: Mater Electron

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Tunnel field effect transistors (TFETs) have proved themselves as a better choice for the replacement of MOSFET due to provision of scalability and possibility of better realization of goal to achieve subthreshold swing less than 60 mV/decade. Challenge of lower ON current in conventional TFET has been overcome by a heterojunction double-gate (DG) TFET structure in which a low bandgap material, magnesium silicide (Mg 2 Si) is implemented as source region. There is dire need to determine the reliability of such device under various constraints to optimize them for low-power and high-speed applications. Therefore, in this paper, authors examine the device reliability by investigating the analog/RF performance of Mg 2 Si source heterojunction double-gate TFET (MSH-DG-TFET) under the influence of interface trap charge polarity and density. This reliability analysis is accomplished by including the effect of trap charges (both positive interface charges, i.e., donors and negative interface charges, i.e., acceptors) at Si/SiO 2 interface. Presence of these trapped acceptor and donor charges at Si/ SiO 2 interface modifies the flat-band voltage which in turn alters the performance of the device. It is revealed that for positive trap charge density of 1 9 10 12 cm -2 , the leakage current or off-state current of MSH-DG-TFET drastically increases from an order of 10 -18 to 10 -14 A/lm, thus degrading the performance. Further, presence of negative trap charges at interface tends to enhance the flat-band voltage that translates to the higher gate bias to turn the device ON. Results reveal that impact of positive interface charges is more pernicious on the device performance as compared to the negative interface charges. Thus, MSH-DG-TFET is susceptible to the donor traps existing at Si/ SiO 2 in comparison with the acceptor traps. Studies carried out may prove to be very useful for future research work in suggesting better TFET structures comprising of Mg 2 Si as source.

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“…In this paper, a novel structure of dual material gate-engineered heterostructure junctionless tunnel field-effect transistor (DMGE-HJLTFET) with a lightly doped source was proposed to improve the performance of a conventional HJLTFET [31,32], where the corresponding heavily p type doping region / intrinsic region / heavily n type doping region (P + -I-N + )structure can be realized by the charge plasma concept with appropriate workfunction for the polar gate (PG) and control gate (CG). The PG is located at the source region and has a larger work function than CG for inducing a P + source while CG is located at the middle for inducing the intrinsic channel.…”

Section: Introductionmentioning

confidence: 99%

Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

et al. 2019

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This paper designs and investigates a novel structure of dual material gate-engineered heterostructure junctionless tunnel field-effect transistor (DMGE-HJLTFET) with a lightly doped source. Similar to the conventional HJLTFET, the proposed structure still adopts an InAs/GaAs0.1Sb0.9 heterojunction at source and channel interface and employs a polarization electric field at the arsenic heterojunction induced by the lattice mismatch in the InAs and GaAs0.1Sb0.9 zinc blende crystal to improve band to band tunneling (BTBT) current. However, the gate electrode is divided into three parts in DMGE-HJLTFET namely the auxiliary gate (M1), control gate (M2) and tunnel gate (M3) with workfunctions ΦM1, ΦM2 and ΦM3, where ΦM1 = ΦM3 < ΦM2, which not only improves ON-state current but also decreases the OFF-state current. In addition, a lightly doped source is used to further decrease the OFF-state current of this device. Simulation results indicate that DMGE-HJLTFET provides superior metrics in terms of logic and analog/radio frequency (RF) performance as compared with conventional HJLTFET, the maximum ON-state current and transconductance of the DMGE-HJLTFET increases up to 5.46 × 10−4 A/μm and 1.51 × 10−3 S/μm at 1.0 V drain-to-source voltage (Vds). Moreover, average subthreshold swing (SSave) of DMGE-HJLTFET is as low as 15.4 mV/Dec at low drain voltages. Also, DMGE-HJLTFET could achieve a maximum cut-off frequency (fT) of 423 GHz at 0.92 V gate-to-source voltage (Vgs) and a maximum gain bandwidth (GBW) of 82 GHz at Vgs = 0.88 V, respectively. Therefore, it has great potential in future ultra-low power integrated circuit applications.

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Design and analysis of energy efficient semi-junctionless n⁺n⁺p heterojunction p-channel tunnel field effect transistor

Cited by 8 publications

References 16 publications

A novel source material engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications

A novel source material engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications

Impact of interfacial charges on analog and RF performance of Mg2Si source heterojunction double-gate tunnel field effect transistor

Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

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Design and analysis of energy efficient semi-junctionless n+n+p heterojunction p-channel tunnel field effect transistor

Cited by 8 publications

References 16 publications

A novel source material engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications

A novel source material engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications

Impact of interfacial charges on analog and RF performance of Mg2Si source heterojunction double-gate tunnel field effect transistor

Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

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Design and analysis of energy efficient semi-junctionless n⁺n⁺p heterojunction p-channel tunnel field effect transistor