Design and Analysis of Five Port Optical Router for Optical NoC

Kalange, Omkar A.; Ladniya, Bhushan B.; Kothari, Rohit R.; Jadhav, Nathrao B.; Chaudhari, Bharat S.

doi:10.1109/icirca.2018.8597198

Cited by 4 publications

(1 citation statement)

References 9 publications

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“…For multi-core processors, two dimensional (2D) ONoCs are designed. The optical routers for 2D ONoC architecture using MRR have been proposed in [8][9][10][11][12][13][14][15]. The number of cores required on-chip are increasing, and so complexity of the on-chip interconnects are increasing.…”

Section: Introductionmentioning

confidence: 99%

Optimized 6x6 Optical Router for Three Dimensional Optical Networks-on-Chip

Jadhav¹,

Chaudhari²

2022

J. Phys.: Conf. Ser.

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The interconnection network is very influential in Multiprocessor system-on-chip (MPSoC) performance. Due to low power efficiency and high latency, conventional interconnects are replaced by electrical networks on-chip (ENoC). However, ENoCs cannot gratify the bandwidth, latency and loss requirements within the available power budget of optical integrated circuits. The reasons being restricted bandwidth, extended delay, and reasonably high power consumption. So, ENoC are being replaced by optical networks-on-chip (ONoC). ONoC has emerged as a promising substitute to provide greater bandwidth, low latency and low power ingestion in MPSoCs. Number of cores required on-chip is increasing which leads to demand of multilayer multi-core processors. Three dimensional (3D) ONoC has become essential for such multilayer multi-core processors. For 3D ONoC, in this paper we have proposed 6x6 non-blocking optical router using micro-ring resonator (MRR) with less number of waveguide crossings and waveguide bendings. Phoenix software is used to simulate proposed optical router. Insertion loss of proposed optical router is lowest among existing non-blocking optical routers of 3D ONoC.

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Section: Introductionmentioning

confidence: 99%

Optimized 6x6 Optical Router for Three Dimensional Optical Networks-on-Chip

Jadhav¹,

Chaudhari²

2022

J. Phys.: Conf. Ser.

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Strict non-blocking four-port optical router for mesh photonic network-on-chip

Xia¹,

Yang²,

Niu³

et al. 2022

J. Semicond.

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We report a strict non-blocking four-port optical router that is used for a mesh photonic network-on-chip on a silicon-on-insulator platform. The router consists of eight silicon microring switches that are tuned by the thermo-optic effect. For each tested rousting state, the signal-to-noise ratio of the optical router is larger than 13.8 dB at the working wavelength. The routing functionality of the device is verified. We perform 40 Gbps nonreturn to zero code data transmission on its 12 optical links. Meanwhile, data transmission using wavelength division multiplexing on eight channels in the C band (from 1525 to 1565 nm) has been adopted to increase the communication capacity. The optical router’s average energy efficiency is 25.52 fJ/bit. The rising times (10% to 90%) of the eight optical switch elements are less than 10 µs and the falling times (90%–10%) are less than 20 µs.

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