Design and analysis of jitter-aware low-power and high-speed TSV link for 3D ICs

Beanato, Giulia; Gharibdoust, Kiarash; Cevrero, Alessandro; Micheli, Giovanni De; Leblebici, Yusuf

doi:10.1016/j.mejo.2015.12.003

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“…The TSV capacitance depends on both the oxide capacitance and the depletion capacitance [17]. As the TSV gate bias increases, the depletion region capacitance starts to increase, and it acts in series with oxide capacitance.…”

Section: Introductionmentioning

confidence: 99%

Numerical Laplace Inversion Method for Through-Silicon Via (TSV) Noise Coupling in 3D-IC Design

2019

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Typical 3D integrated circuit structures based on through-silicon vias (TSVs) are complicated to study and analyze. Therefore, it seems important to find some methods to investigate them. In this paper, a method is proposed to model and compute the time-domain coupling noise in 3D Integrated Circuit (3D-IC) based on TSVs. It is based on the numerical inversion Laplace transform (NILT) method and the chain matrices. The method is validated using some experimental results and the Pspice and Matlab tools. The results confirm the effectiveness of the proposed technique and the noise is analyzed in several cases. It is found that TSV noise coupling is affected by different factors such as source characteristics, horizontal interconnections, and the type of Inputs and Outputs (I/O) drivers.

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Section: Introductionmentioning

confidence: 99%