2020 IEEE 70th Electronic Components and Technology Conference (ECTC) 2020
DOI: 10.1109/ectc32862.2020.00068
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Design and Analysis of Logic-HBM2E Power Delivery System on CoWoS® Platform with Deep Trench Capacitor

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Cited by 18 publications
(1 citation statement)
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“…Through-silicon-vias (TSVs), the biggest feature of 3D-SICs, enable vertical signal transfer among stacked ICs which enhances performance and energy by optimized signal lines between stacked ICs [8][9][10][11][12][13]. Although wider signal bus is required for enormous scale data transfer, densely manufactured signal bus needs to solve crosstalk among the channels [14][15][16][17][18][19][20] as well as power line noise [21][22][23][24][25][26][27]. To avoid bit error caused by such crosstalk, it requires frequency or voltage optimization that cause additional issues like lower data transfer speed or larger power consumption, respectively [28,29].…”
Section: Introductionmentioning
confidence: 99%
“…Through-silicon-vias (TSVs), the biggest feature of 3D-SICs, enable vertical signal transfer among stacked ICs which enhances performance and energy by optimized signal lines between stacked ICs [8][9][10][11][12][13]. Although wider signal bus is required for enormous scale data transfer, densely manufactured signal bus needs to solve crosstalk among the channels [14][15][16][17][18][19][20] as well as power line noise [21][22][23][24][25][26][27]. To avoid bit error caused by such crosstalk, it requires frequency or voltage optimization that cause additional issues like lower data transfer speed or larger power consumption, respectively [28,29].…”
Section: Introductionmentioning
confidence: 99%