Design and Characterization of Backside Termination Structures for Thick Fully-Depleted MAPS

Corradino, Thomas; Betta, G.-F. Dalla; Cilladi, Lorenzo de; Neubüser, C.; Pancheri, Lucio

doi:10.3390/s21113809

Cited by 4 publications

(5 citation statements)

References 23 publications

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“…To enable particle identification and pileup rejection, a challenging requirement in terms of detector timing resolution, that should be lower than 20 ps, has been set for the sensors of the ToF layers of the ALICE 3 detector. Those sensors will also have to guarantee a moderate radiation hardness in terms of Non-Ionizing Energy Loss (NIEL) and Total Ionizing Dose (TID) in the order of 10 13 1 MeV n eq cm −2 and 1 Mrad, respectively [15].…”

Section: Jinst 19 C02036mentioning

confidence: 99%

“…A continuous p-type implant was included on the backside surface of the 100 μm thick sensors to create the backside p-n junction. Instead, a dedicated backside lithography step was used to form the backside p-n junction and the guard rings designed to prevent the junction breakdown in the devices with 200 μm active thickness [13]. A surface n-type epitaxial layer, having a higher doping concentration than the n-type active volume, is present in all wafers.…”

Section: Introductionmentioning

confidence: 99%

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Simulation and first characterization of MAPS test structures with gain for timing applications

Corradino,

Neubüser,

Giovanazzi

et al. 2024

J. Inst.

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Thanks to their advantages in terms of easiness of manufacturing and reduced production costs, Monolithic Active Pixel Sensors (MAPS) represent an appealing solution for radiation imaging applications, which require to cover large areas with pixelated detectors. In the next upgrade of the ALICE detector, that will have to deal with the higher event rate resulting from the planned increase in the LHC luminosity, it is foreseen to include two additional sensor layers to perform Time of Flight (ToF) measurements. Trying to reach the challenging timing resolution required by the ALICE ToF layers, an internal gain layer has been included in the test structures of the third engineering run of the ARCADIA project to improve the timing performance of this MAPS technology. In the paper we will present an overview of the main results obtained from the electrical and the dynamic characterization of the fabricated devices, which have been compared with the behavior expected from the preliminary TCAD simulations carried out in the design phase. The experimental results confirmed the feasibility of embedding a gain layer in the ARCADIA 110 nm CMOS technology to develop monolithic LGADs.

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Section: Jinst 19 C02036mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Simulation and first characterization of MAPS test structures with gain for timing applications

Corradino,

Neubüser,

Giovanazzi

et al. 2024

J. Inst.

Self Cite

View full text Add to dashboard Cite

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“…In an analogous way, the backside terminating structures included around the pixel matrices of type 3 wafers were designed to guarantee a breakdown voltage higher than the upper bound of the operating voltage range. We reported in [12] the simulation results and the experimental measurements performed on backside diodes with variable floating guard ring number included in a previous production. The reported data demonstrated the effectiveness of the designed backside structures, which were able to stand a bias voltage exceeding 400 V. Figure 3 represents an example of the IV curves measured on two pixel arrays with 50 and 25 μm pixel pitch and a matrix area of 1.5 × 1.5 mm 2 extracted from a wafer with 48 μm active substrate thickness.…”

Section: Jinst 18 C02045 2 Electrical Characterization Of Passive Pix...mentioning

confidence: 99%

ARCADIA MAPS process qualification through the electrical characterization of passive pixel arrays

et al. 2023

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The development of novel Monolithic Active Pixel Sensor (MAPS) technologies has been pursued by several collaborations in the last two decades. The ARCADIA project aims to design fully depleted MAPS for medical, space, HEP and X-ray detection applications, that can be produced with a commercial 110 nm CMOS production process. Among the test structures of the first two engineering runs of the project, passive pixel arrays with different pitches and layouts were included. The main characteristics of the produced devices in terms of dark current, depletion voltage, punch through current and pixel capacitance have been evaluated from IV and CV characteristics of the pixel arrays. Groups of four samples have been extracted from as many different positions within each wafer and electrically characterized to obtain information on the variability in the pixel operating voltage range and in the pixel dark current, reflecting variations related to the employed production process. The experimental data demonstrated a good uniformity in the considered parameters for different sample positions within the produced wafers, as well as for samples extracted from different wafers with the same substrate type.

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“…Within the SEED project, predecessor of ARCADIA, a first production of passive test-structures and a test chip called MATISSE [9] had been produced. A passive pixel matrix (also called pseudo-matrix) consisting of three pixel areas with three different pixel pitches; 10, 25 and 50 μm, was designed and tested [10]. Thereby the sub-matrices consist of 40 × 45, 16 × 18, and 8 × 9 pixels, respectively, sharing a common readout electrode.…”

Section: Simulation Validation On Passive Pixel Matricesmentioning

confidence: 99%

Impact of X-ray induced radiation damage on FD-MAPS of the ARCADIA project

et al. 2022

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Recent advancements in Monolithic Active Pixel Sensors (MAPS) demonstrated the ability to operate in high radiation environments of up to multiple kGy’s, which increased their appeal as sensors for high-energy physics detectors. The most recent example in such application is the new ALICE inner tracking system, entirely instrumented with CMOS MAPS, that covers an area of about 10 m2. However, the full potential of such devices has not yet been fully exploited, especially in respect of the size of the active area, power consumption, and timing capabilities. The ARCADIA project is developing Fully Depleted (FD) MAPS with an innovative sensor design, that uses a proprietary processing of the backside to improve the charge collection efficiency and timing over a wide range of operational and environmental conditions. The innovative sensor design targets very low power consumption, of the order of 20 mW cm−2 at 100 MHz cm−2 hit flux, to enable air-cooled operations of the sensors. Another key design parameter is the ability to further reduce the power regime of the sensor, down to 5 mW cm−2 or better, for low hit rates like e.g. expected in space experiments. In this contribution, we present a comparison between the detector characteristics predicted with Technology Computer Aided Design (TCAD) simulations and the ones measured experimentally. The comparison focuses on the current-voltage (IV) and capacitance-voltage (CV) characteristics, as well as noise estimated from in-pixel capacitances of passive/active pixel matrices. In view of the targeted applications of this technology, an emphasis is set on the modeling of X-ray induced radiation damage at the Si-SiO2 interface and the impact on the in-pixel sensor capacitance. The so-called new Perugia model has been used in the simulations to predict the sensor performance after total ionizing doses of up to 10 Mrad.

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Design and Characterization of Backside Termination Structures for Thick Fully-Depleted MAPS

Cited by 4 publications

References 23 publications

Simulation and first characterization of MAPS test structures with gain for timing applications

Simulation and first characterization of MAPS test structures with gain for timing applications

ARCADIA MAPS process qualification through the electrical characterization of passive pixel arrays

Impact of X-ray induced radiation damage on FD-MAPS of the ARCADIA project

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