Design and Demonstration of 2.5D Glass Interposers as a Superior Alternative to Silicon Interposers for 28 Gbps Signal Transmission

Sawyer, Brett; Chou, Bruce; Tong, Jialing; Vis, William; Panayappan, Kadappan; Deng, Shuhui; Tournier, Hugues; Tummala, Rao

doi:10.1109/ectc.2016.321

Cited by 10 publications

(4 citation statements)

References 7 publications

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“…9,10 Consequently, the design and fabrication of low-k dielectric materials are the key to break the "bottleneck" in the development of electronic power systems. Meanwhile, the exploitation of low-k materials has involved multiple industrial areas, such as communication engineering, 11−13 integrated circuits, 14,15 aerospace, 16,17 and autonomous driving instruments 18 (Figure 1a).…”

Section: Introductionmentioning

confidence: 99%

“…Due to the increase in voltage and load, the insulation system in transformers has been seriously affected by the difference in permittivity between oil/paper materials, which seriously affects the safety and reliability of equipment in permanent operation. , Consequently, the design and fabrication of low- k dielectric materials are the key to break the “bottleneck” in the development of electronic power systems. Meanwhile, the exploitation of low- k materials has involved multiple industrial areas, such as communication engineering, − integrated circuits, , aerospace, , and autonomous driving instruments (Figure a).…”

Section: Introductionmentioning

confidence: 99%

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Versatile Landscape of Low-k Polyimide: Theories, Synthesis, Synergistic Properties, and Industrial Integration

Dong,

Wan,

Zha

2024

Chem. Rev.

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The development of microelectronics and large-scale intelligence nowadays promotes the integration, miniaturization, and multifunctionality of electronic and devices but also leads to the increment of signal transmission delays, crosstalk, and energy consumption. The exploitation of materials with low permittivity (low-k) is crucial for realizing innovations in microelectronics. However, due to the high permittivity of conventional interlayer dielectric material (k ∼ 4.0), it is difficult to meet the demands of current microelectronic technology development (k < 3.0). Organic dielectric materials have attracted much attention because of their relatively low permittivity owing to their low material density and low single bond polarization. Polyimide (PI) exhibits better application potential based on its well permittivity tunability (k = 1.1−3.2), high thermal stability (>500 °C), and mechanical property (modulus of elasticity up to 3.0−4.0 GPa). In this review, based on the synergistic relationship of dielectric parameters of materials, the development of nearly 20 years on low-k PI is thoroughly summarized. Moreover, process strategies for modifying low-k PI at the molecular level, multiphase recombination, and interface engineering are discussed exhaustively. The industrial application, technological challenges, and future development of low-k PI are also analyzed, which will provide meaningful guidance for the design and practical application of multifunctional low-k materials.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Versatile Landscape of Low-k Polyimide: Theories, Synthesis, Synergistic Properties, and Industrial Integration

Dong,

Wan,

Zha

2024

Chem. Rev.

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“…Instructive examples of such low aspect ratio applications include CMOS Image Sensors for wafer-level processes. [1][2][3][4][5][6] A striking challenge of 3DIC engineering is thermal throttling when multi chips are stacked together. The signal performance is limited by a chip to chip thermal coupling effect.…”

Section: Introductionmentioning

confidence: 99%

Reliability Evaluation for Integrated Glass Interposer

Lee

Wang

Chang

et al. 2016

Transactions of The Japan Institute of Electronics Packaging

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In this paper, we investigate reliability testing for a glass interposer. The test vehicle includes a glass interposer with a chip substrate and a bismaleimide triazine (BT) substrate. The structure of a glass interposer with two redistribution layers (RDLs) on the front-side and one RDL on the back-side has been evaluated and developed. Key technologies, including via fabrication, front-side RDL formation, microbumping, temporary bonding, glass thinning, and back-side RDL formation, have been developed and integrated for high performance. The BT substrate design for electrical characterization of reliability tests is reported in this paper. The results indicate that this glass interposer can be effective for the assembly of thin substrates. The data shows the feasibility of this glass interposer for electronics applications.

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“…Several interconnect technologies have been proposed in the recent past with targets to achieve high performance system level integration. Silicon interposer technology has been presented as a solution for high interconnect density with a thinned silicon as a redistribution layer (RDL) between dielets [16][17][18][30][31][32]. However, the interposer size and the Through Silicon Via (TSV) cost restrict the wide spread applicability of the technology.…”

Section: A Interconnect Technologymentioning

confidence: 99%

Latency, Bandwidth and Power Benefits of the SuperCHIPS Integration Scheme

Jangam

Pal

Bajwa

et al. 2017

2017 IEEE 67th Electronic Components and Technology Conference (ECTC)

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Abstract-In this paper, we describe the performance and power benefits of our Fine Pitch integration scheme on a Silicon Interconnect Fabric (Si IF). Here we propose a Simple Universal Parallel intERface (SuperCHIPS) protocol enabled by fine pitch dielet to interconnect fabric assembly. We show the dramatic improvements in bandwidth, latency, and power are achievable through our integration scheme where small dielets (1-25 mm 2 ) are attached to a rigid Silicon Interconnect Fabric (Si-IF) at fine interconnect pitch (2-10 μm) and short inter-die distance (50-500 μm) using solderless metal-to-metal thermal compression bonding (TCB). Our simulations show that links in the Si-IF with short wire-lengths (<500 μm) have excellent signal transfer characteristics with low channel loss (<-2 dB) and low cross-talk (<-15 dB). With fine interconnect pitches (<10 μm), our scheme can achieve >5-25x improvement in data bandwidth. This can improve system performance (>20x) when compared to PCB-style integration and may even approach single die SoC metrics in some cases. Furthermore our protocol is simple and non-proprietary. We show that this scheme enables heterogeneous system integration using a dielet based assembly method and provides significant reduction in design and validation cost.System-level analysis of heterogeneous integration scheme promises power benefits of more than 15% even for very small systems.

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Design and Demonstration of 2.5D Glass Interposers as a Superior Alternative to Silicon Interposers for 28 Gbps Signal Transmission

Cited by 10 publications

References 7 publications

Versatile Landscape of Low-k Polyimide: Theories, Synthesis, Synergistic Properties, and Industrial Integration

Versatile Landscape of Low-k Polyimide: Theories, Synthesis, Synergistic Properties, and Industrial Integration

Reliability Evaluation for Integrated Glass Interposer

Latency, Bandwidth and Power Benefits of the SuperCHIPS Integration Scheme

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