Design and Evaluate Recomposited OR-AND-XOR-PUF

Yao, Jianrong; Pang, Lihui; Su, Yang; Zhang, Zhi; Yang, Wei; Fu, Anmin; Gao, Yansong

doi:10.1109/tetc.2022.3170320

Cited by 16 publications

(5 citation statements)

References 43 publications

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“…To resist machine learning attacks and detect any possible invasive attacks, different research groups have implemented further countermeasures. These involve integrating additional software functionalities, such as hashing, non-linear functions, and ephemeral CRP tables, or incorporating hardware solutions like XOR gates, CMOS, and other logic circuits [59], [60], [61], [62], [63], [64], [65]. For instance, [66], [67], [68] developed an obfuscated challenge-response protocol that utilizes a PUF chip, a random number generator (RNG), and a control block to safeguard against machine learning attacks, circumventing the need for traditional cryptographic techniques.…”

Section: B Quantum Unreality and Uncertainty For Synchrophasor Techno...mentioning

confidence: 99%

Securing Synchrophasors Using Data Provenance in the Quantum Era

Javed,

Ali Khan,

Ullah

et al. 2024

IEEE Open J. Commun. Soc.

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Trust in the fidelity of synchrophasor measurements is crucial for the correct operation of modern power grids. While most of the existing research on data provenance focuses on the Internet of Things, there is a significant need for effective malicious data detection in power systems. Current methods either fail to detect malicious data modifications or require certain Phasor Measurement Units (PMUs) to be physically secured. To solve these issues, this paper presents a new protocol to establish data provenance in synchrophasor networks. The proposed protocol is based on Physically Unclonable Functions (PUFs) and harnesses the principles of quantum unreality and uncertainty. It aims not only to verify the source of data but also to provide robust protection against data tampering. The proposed protocol serves the purpose of devising new protocols to protect our critical infrastructure sectors in the quantum era. Security and performance analyses, along with experiments conducted on IBM's Qiskit platform, demonstrate that the protocol offers a strong defense against cyberattacks while maintaining a lightweight profile. In particular, the proposed protocol has a worst-case computational complexity of O(1), an execution time per packet bounded by the time required to compute a cryptographically secure hash, and an upper bound for the per packet communication overhead of 256-bits. In terms of storage overhead, the proposed protocol requires each PMU to store the output of a cryptographically secure hash function, while the PDC needs to store one challenge-response pair (CRP) for each PMU.

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Section: B Quantum Unreality and Uncertainty For Synchrophasor Techno...mentioning

confidence: 99%

Securing Synchrophasors Using Data Provenance in the Quantum Era

Javed,

Ali Khan,

Ullah

et al. 2024

IEEE Open J. Commun. Soc.

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“…Here, k represents the number of samples and HD (Ri, Rj) denotes the HD between any two instances i and j [29,30]. We performed 50 Monte Carlo simulations for the APUF and PN-APUF under golden conditions and the same challenge.…”

Section: Identifiabilitymentioning

confidence: 99%

PN-APUF: A MOSFET threshold loss based strong arbiter PUF with double-edge sampling

Shao,

Ma,

et al. 2024

IEICE Electron. Express

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Arbiter physically unclonable function (APUF) is one of the most representative strong PUFs. Improving traditional APUF can enhance the performance of APUF-based PUFs. Accordingly, based on the theoretical foundation of traditional APUF, this paper proposes a novel PUF that utilizes the threshold loss, in which the PMOS transmits at a low level and the NMOS transmits at a high level, as the deviation source. In this manner, we significantly extended the delay deviation of both the rising and falling edges, thereby improving the randomness of PUF. The proposed PUF passed six subtests of the NIST randomness test suite. The delay unit only uses 20 minimum-size transistors with a fully custom layout area of 6.14 μm 2 in the TSMC 65-nm process, reducing the area by 15% compared to traditional APUF. The core area feature size is 93,018 F 2 which is more than sixfold reduction to the voltage-based PUFs. Furthermore, the proposed PUF generates twice the number of challenge-response pairs by sampling the rising and falling edges. It also exhibits a superior resistance against machine learning attacks compared to APUF, making it a better alternative.

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“…The ratio of "0" or "1" response bits in a PUF is known as uniformity. This fraction needs to be 50% for really arbitrary PUF responses [53]. Calculating the uniformity is as follows: [54] Uni f ormity =…”

Section: Reliabilitymentioning

confidence: 99%

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

Mahmud¹,

Sadhu²,

Yanambaka³

et al. 2023

Preprint

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The Internet of Medical Things (IoMT) is playing a pivotal role in the healthcare sector by allowing faster and more informed hospital care, personalized treatment, and medical solutions. A very effective and trustworthy solution for resource-constrained medical devices is provided by Physical Unclonable Functions (PUF) - based identity and authentication systems, however they are not yet entirely reliable. This paper proposes VXorPUF, a Vedic Principles - Based Hybrid XOR Arbiter PUF. Modeling attacks were performed on the proposed architecture and an accuracy of 49.80 % was achieved. Uniqueness, Reliability and Randomness were the figures of merit used to evaluate PUF.

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Design and Evaluate Recomposited OR-AND-XOR-PUF

Cited by 16 publications

References 43 publications

Securing Synchrophasors Using Data Provenance in the Quantum Era

Securing Synchrophasors Using Data Provenance in the Quantum Era

PN-APUF: A MOSFET threshold loss based strong arbiter PUF with double-edge sampling

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

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