Design and Evaluation of Flash ADC

Inamdar, Amol; Sahu, Anubhav; Ren, Jie; Setoodeh, Sormeh; Mansour, Raafat R.; Gupta, Deepnarayan

doi:10.1109/tasc.2014.2365717

Cited by 15 publications

(4 citation statements)

References 7 publications

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“…Over the course of several decades, some ADC architectures have been developed and widely used, such as flash [1,2,3], pipeline [4,5,6], sigma-delta [7,8], SAR [9,10,11,12], and interleaved [13,14,15] ADCs. Each owns specific characteristics in terms of sample rate, accuracy, etc.…”

Section: Introductionmentioning

confidence: 99%

A 10-bit 120MS/s SAR ADC using tri-switch sampling and VCM-stable switching scheme in 40-nm CMOS

Zhao

2023

IEICE Electron. Express

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A 10-bit 120MS/s successive-approximation-register (SAR) analog-to-digital converter (ADC) in 40-nm CMOS is presented. To diminish the fluctuation of common-mode voltage (VCM) and switching energy during conversion, a VCM-stable switching scheme is adopted without increasing the design complexity to 𝑉 𝐶 𝑀 buffers. Moreover, triswitch sampling is employed in this design. Together with the binary-scaled recombination weighting (BSRW) method, it cancels the gain error and non-linearity caused by the parasitic input capacitor of comparators. The measurement results show that the reported ADC achieves an ENOB of 9.3 bits sampled at 120MS/s. The worst differential non-linearity (DNL) and integrated non-linearity (INL) are both below 0.5 LSB. The proposed ADC consumes 1.08-mW power, resulting in a figure of merit (FoM) of 14.3 fJ/Conv.-step.

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Section: Introductionmentioning

confidence: 99%

A 10-bit 120MS/s SAR ADC using tri-switch sampling and VCM-stable switching scheme in 40-nm CMOS

Zhao

2023

IEICE Electron. Express

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“…In other words, the number of samples needed to reconstruct a signal depends on its bandwidth. However, due to the very short duration and ultrabroadband nature of the transmitted THz signals, this theorem imposes several challenges on the hardware, storage, and subsequent signal processing ultimately leading to stressed out analog-to-digital converters (ADCs) at the receiver side [4,5]. Moreover, the state-of-the art ADCs can only sample at rates around 100 Giga-Samples-per-second (GSas) [6,7], much below the Nyquist rate for THz signals.…”

Section: Introductionmentioning

confidence: 99%

Compressed Detection for Pulse‐Based Communications in the Terahertz Band

Singh

Kim

Jung

2018

Wireless Communications and Mobile Computing

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Terahertz (THz) band (0.1-10 THz)-based electromagnetic communications are envisioned as a key technology to enable future high-data-rate short-range ultrabroadband communications. However, one of the fundamental bottlenecks is the efficiency of the analog-to-digital converters (ADCs) considering the formidable challenge of sampling the signal at the Nyquist rate eventually increasing transceiver design complexity. The Compressed sensing (CS) framework enables the successful reconstruction of sparse signals from a small set of projections onto a random vector which would lead to sub-Nyquist rate sampling. In this paper, THz band channel estimation based on the theory of CS is developed. The proposed approach exploits the fact that transmitting an ultrashort pulse through a multipath THz channel leads to a received THz signal that can be approximated by a linear combination of a few atoms from a predefined dictionary, yielding thus a sparse representation of the received signal. The fundamental idea is in the design of the dictionary of atoms that closely matches the transmitted pulse leading thus to a higher probability of CS reconstruction. The Orthogonal Matching Pursuit (OMP) algorithm is used to identify the strongest atoms in the projected signal. This reconstructed signal is subsequently used as a reference template in a correlator-based detector. The bit error rate (BER) performance of the proposed detector is analyzed and compared with the conventional CS-based channel estimation and reconstruction approach. Extensive simulations show that, for different design parameters, our proposed detector outperforms the traditional CS-based correlator receiver for the same sampling rate leading thus to a much-reduced use of analog-to-digital resources. Moreover, the proposed detector has been shown to reduce the hardware complexity of the receiver by significantly reducing the number of parallel mixer-integration branches.

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“…This code is called the thermometer code. It is converted to binary code in the priority encoder [7][8][9][10][11].…”

Section: Introductionmentioning

confidence: 99%

Expandable Flash-Type CMOS Analog-to-Digital Converter for Sensor Signal Processing

Oh¹,

Choi²,

Kim³

et al. 2017

Journal of Sensor Science and Technology

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The analog-to-digital converter (ADC) is an important component in various fields of sensor signal processing. This paper presents an expandable flash analog-to-digital converter (E-flash ADC) for sensor signal processing using a comparator, a subtractor, and a multiplexer (MUX). The E-flash ADC was simulated and designed in 0.35-µm standard complementary metal-oxide semiconductor (CMOS) technology. For operating the E-flash ADC, input voltage is supplied to the inputs of the comparator and subtractor. When the input voltage is lower than the reference voltage, it is outputted through the MUX in its original form. When it is higher than the reference voltage, the reference voltage is subtracted from the input value and the resulting voltage is outputted through the MUX. Operation of the MUX is determined by the output of the comparator. Further, the output of the comparator is a digital code. The E-flash ADC can be expanded easily.

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Design and Evaluation of Flash ADC

Cited by 15 publications

References 7 publications

A 10-bit 120MS/s SAR ADC using tri-switch sampling and VCM-stable switching scheme in 40-nm CMOS

A 10-bit 120MS/s SAR ADC using tri-switch sampling and VCM-stable switching scheme in 40-nm CMOS

Compressed Detection for Pulse‐Based Communications in the Terahertz Band

Expandable Flash-Type CMOS Analog-to-Digital Converter for Sensor Signal Processing

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