Design and evaluation of the rollback chip: special purpose hardware for Time Warp

Fujimoto, Richard M.; Tsai, Jya-Jang; Gopalakrishnan, G.

doi:10.1109/12.123382

Cited by 77 publications

(28 citation statements)

References 11 publications

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“…While designing MASM we have been therefore faced with the problem of how to distinguish between the process memory image portions containing data belonging to the federate and those portions containing data belonging to the RTI. Moreover, as widely shown (see, e.g., [2,4,5,16,17,19]) checkpointing might dominate on the run-time performance of optimistic simulation systems if not executed in an optimized manner. Hence, MASM also needs to address the issue of performing checkpointing operations efficiently by incrementally logging only dirty pages within the memory image portion related to the federate.…”

Section: Masm Overviewmentioning

confidence: 98%

A version of MASM portable across different UNIX systems and different hardware architectures

Santoro

Quaglia

2005

Ninth IEEE International Symposium on Distributed Simulation and Real-Time Applications

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MAgic State Manager (MASM) is a recently developed software architecture for completely transparent checkpointing/recovery in support of optimistic synchronization in the High Level Architecture. In the original design, MASM relies on (i) user level machine dependent modules, (ii) patches for specific versions of the LINUX kernel and (iii) static linking of specific application libraries, all of them required for performing ad-hoc, low level memory management operations associated with optimistic synchronization requirements. In this paper we propose a complete re-engineering of this software architecture which allows all those memory management tasks to be carried out through user level, machine independent modules, with the additional advantage of avoiding the need for static linking of specific application libraries, thus achieving portability of MASM across different UNIX systems and different computer architectures.

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Section: Masm Overviewmentioning

confidence: 98%

A version of MASM portable across different UNIX systems and different hardware architectures

Santoro

Quaglia

2005

Ninth IEEE International Symposium on Distributed Simulation and Real-Time Applications

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“…Earlier works employed auxiliary processors designed specifically to form a Parallel Reduction Network (PRN) in order to accelerate parallel global reduction as characterized by the computation of GVT and LBTS values [148]. Fujimoto et al presented a rollback chip that implements state saving and rollback functions for the LPs mapped on each processor in Time Warp optimistic simulations [149]. In [150], Rosu et al proposed an architecture for offloading communication-related functionality from the main processor to the network interface coprocessor, exposing such functionality as a Virtual Communication Machine (VCM) to simulation applications.…”

Section: Hardware Accelerationmentioning

confidence: 99%

Synchronization methods in parallel and distributed discrete-event simulation

Jafer

Liu

Wainer

2013

Simulation Modelling Practice and Theory

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a b s t r a c tThis work attempts to provide insight into the problem of executing discrete event simulation in a distributed fashion. The article serves as the state of the art in Parallel DiscreteEvent Simulation (PDES) by surveying existing algorithms and analyzing the merits and drawbacks of various techniques. We discuss the main characteristics of existing synchronization methods for parallel and distributed discrete event simulation. The two major categories of synchronization protocols, namely conservative and optimistic, are introduced and various approaches within each category are presented. We also present the latest efforts towards PDES on emerging platforms such as heterogeneous multicore processors, Web services, as well as Grid and Cloud environment.Ó 2012 Elsevier B.V. All rights reserved. Parallel discrete-event simulationWith the computing power and advanced software available today, modeling and simulation has become a cost-effective tool for detailed analysis of a broad array of natural and artificial systems. Parallel and distributed simulation is widely accepted as the technology of choice to speed up large-scale discrete-event simulation and to promote reusability and interoperability of simulation components. Parallel Discrete-Event Simulation (PDES) has received increasing interest as simulations become more time consuming and geographically distributed. A rich literature has already been developed in the last three decades, taking advantage of the increasing availability of highly parallel and distributed computing platforms. It has been several years since the last survey by Perumalla [5] and a refreshed review of the latest developments would be needed for us to ponder new research initiatives, especially on emerging platforms such as many-core processors, Internetscale simulation environments, and cloud-based virtualized infrastructures.In parallel and distributed simulations, the entire simulation task is divided into a set of smaller subtasks with each executed on a different processor or node. Hence, the simulation system is viewed as a collection of concurrent processes, each modeling a different part of the physical system and executing on a dedicated processor in a sequential fashion. These processes communicate with each other by exchanging time-stamped event messages. An event refers to an update to simulation system state at a specific simulation time instant. Throughout the simulation, events arrive at destination processes, and depending on the delivery ordering system of the simulation, they are processed differently. The two commonly used orderings are (1) receive-order and (2) timestamp-order. With the first type, events are delivered to the destination processes when they arrive at the destination. On the other hand, with the timestamp-order, events are delivered in non-decreasing order of their timestamp, requiring runtime checks and buffering to ensure such ordering.1569-190X/$ -see front matter Ó

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“…In this case, a state to be restored due to rollback is always available, but, unless special hardware is employed to accelerate the state saving operation [9], the checkpointing overhead can reach unacceptable levels. Sparse and incremental state saving aim at reducing such an overhead.…”

Section: *Work Partially Supported By Grant No Erb4050pl932483 From mentioning

confidence: 99%

Event history based sparse state saving in time warp

Quaglia

1998

SIGSIM Simul. Dig.

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Design and evaluation of the rollback chip: special purpose hardware for Time Warp

Cited by 77 publications

References 11 publications

A version of MASM portable across different UNIX systems and different hardware architectures

A version of MASM portable across different UNIX systems and different hardware architectures

Synchronization methods in parallel and distributed discrete-event simulation

Event history based sparse state saving in time warp

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