Design and FPGA Implementation of Immune-PID Controller Based on BBO Algorithm for Heart Rate Regulation

Mohsin, Eman Falah; Tashan, Tariq; Karam, Ekhlas H.

doi:10.22266/ijies2021.0430.39

Cited by 4 publications

(2 citation statements)

References 18 publications

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“…So far, the system designed in this way has high program readability, high logic synthesis efficiency, and good program portability. Without phase truncation, the output phase sequence of the phase accumulator Y½n is as follows [5,6]:…”

Section: Electromagnetic Occlusion Algorithmmentioning

confidence: 99%

Electromagnetic Occlusion Algorithm Based on FPGA and Panel Grouping and Its Optimization

Cao

2021

Wireless Communications and Mobile Computing

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With the development of digital signal processing and advanced algorithms, real-time signal processing based on FPGA and DSP is suitable for high-speed radar signal processing. With the rapid development of science and technology, war has entered the information age guided by high technology, and advanced science and technology has played a vital role in the trend of war. In recent years in the modern war, many countries invest a lot of research effort on the stealth technology, and advanced stealth technology can use a variety of technical means to alter or weaken the feature information of the target, confuse the enemy radar detection system effectively, reduce the chance of being detected to the largest extent, and prolong the lifecycle of aircraft and weapons. This research mainly discusses the electromagnetic occlusion algorithm and its optimization based on FPGA and panel grouping. The FPGA model selected for this study is XC6VLX240T-1FF1156I. Because the amount of data processed here is not very large, the cache part directly uses the on-chip storage resources of the FPGA, and the AD device is used to perform analog-to-digital/digital-to-analog conversion on the signal and perform digital up-down conversion. For a facet, it is necessary to first verify whether it is a bright facet and set the flag to mark it, then the facet needs to be occluded with the triangular facet marked as a bright facet, and all bright facets that have been marked need to be traversed. Open MP parallelization of the occlusion algorithm is as follows: The physical optics method is used to calculate the target RCS, and the focus of parallelism is placed on the part with a large amount of calculation. When using Open MP to design a program on a multicore computer, each group is assigned a thread to give full play to the core computing power. The total field is scattered and superimposed by each surface element. This part uses the parallel processing mode of Open MP, which allows the panel judgment in the group to be carried out at the same time. This part requires schedule to allocate resources and use different parallel mechanisms for different calculations to optimize debugging. In the angular range where there is multiple scattering at 0 ° ≤ φ ≤ 90 ° , the calculation results and the measurement results are in good agreement, and when the two planes are simulated with 1820 triangular faces, the fast multiple scattering in this paper only needs 4 minutes. This research has realized the general radar signal processing method based on FPGA structure, and the design has important engineering realization significance.

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Section: Electromagnetic Occlusion Algorithmmentioning

confidence: 99%

Electromagnetic Occlusion Algorithm Based on FPGA and Panel Grouping and Its Optimization

Cao

2021

Wireless Communications and Mobile Computing

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“…This model accurately models the behavior of the three main components of the heart, and it does not accurately simulate the behavior of real ECG signals. Eman F. Mohsin et al 28 had suggested an optimal immune‐proportional‐integral‐derivative (immune‐PID) strategy to manage the human's heart rate. However, a chattering problem arises, which reduces the performance of the PID controller.…”

Section: Introductionmentioning

confidence: 99%

Design and analysis of batteryless cardiac pacemaker through combining thermoelectric generators along with DC‐DC converter

Shwetha¹,

Lakshmi

2021

Int Trans Electr Energ Syst

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Implantable cardiac pacemakers are equipped with batteries to provide power supply that have a limited lifetime. Battery-based implantable cardiac pacemakers need surgical intervention to replace batteries. This is an undesirable condition that can increase the risk of complications and costs for patients. To overcome the above shortcomings, a batteryless cardiac pacemaker is introduced, which harvests energy from the body temperature. In this article, a batteryless cardiac pacemaker is designed, which is powered by sustainable energy sources. Hence, thermoelectric generators (TEGs) are considered the sustainable renewable energy source that powers up cardiac pacemakers with effective reduction in dimension without limiting the capacity. Then, power electronic converters adapted with TEGs has enhanced the ability of controlling environmental conditions as well as maximizing energy harvesting. Therefore, a DC-DC converter is designed with TEG to solve environmental conditions issues of TEG. In this proposed methodology, a TEG with three different types of DC-DC converters is designed and validated to analyze the performance of converters such as boost converter, buck converter, and buckboost converter. The proposed design was analyzed based on a case example and simulated using Cadence Capture CIS. Finally, a prototype of our design was developed to evaluate the experimental outcome. Four modules are designed and validated: general pacemaker, TEG with pacemaker, TEG with boost converter, TEG with buck converter, and TEG with buck-boost List of Symbols and Abbreviations: ρ, density; Q, heat flux; Q, volumetric heat; C P , specific heat at consonant pressure; j !

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Building a fully digital controller with Altera Cyclone FPGA and Nios Processor for Induction Heating application

Villamizar,

Borra,

2024

Preprint

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This paper presents the development of a fully digital controller designed for induction heating machines capable of delivering up to 50 kW across a frequency range up to 500 kHz. A critical feature of the controller is its ability to prevent operation within capacitive region, thereby safeguarding the integrity of the inverter. The control strategy employs a proportional-integral algorithm based on phase shift between voltage and current to regulate power by adjusting frequency. The phase shift calculation is achieved through successive subtractions performed at high speed. Performance evaluation was conducted by comparing the obtained phase shift with the setpoint. The implementation utilizes Intel Altera devices, ensuring robust performance and adaptability. Experimental results demonstrate the controller’s efficacy, achieving low errors within specified safety margins of operation. The proposed architecture can be adapted to implement control systems for different modulation techniques. This research contributes to advancing digital control solutions in high-frequency power electronics, offering scalability and versatility for industrial applications.

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Design and FPGA Implementation of Immune-PID Controller Based on BBO Algorithm for Heart Rate Regulation

Cited by 4 publications

References 18 publications

Electromagnetic Occlusion Algorithm Based on FPGA and Panel Grouping and Its Optimization

Electromagnetic Occlusion Algorithm Based on FPGA and Panel Grouping and Its Optimization

Design and analysis of batteryless cardiac pacemaker through combining thermoelectric generators along with DC‐DC converter

Building a fully digital controller with Altera Cyclone FPGA and Nios Processor for Induction Heating application

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