2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC) 2011
DOI: 10.1109/apec.2011.5744766
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Design and hardware implementation of Gen-1 silicon based solid state transformer

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Cited by 88 publications
(27 citation statements)
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“…The rated input line to line voltage is 190 V, the rated low DC voltage is 42.5 V, and the rated output line to neutral voltage is 20 V. The load resistance of each phase is 2. 8 , and the input inductance is 20 mH. The switching frequency in the input stage is 1 kHz, and the switching frequency in the output stage is 4 kHz.…”
Section: Resultsmentioning
confidence: 99%
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“…The rated input line to line voltage is 190 V, the rated low DC voltage is 42.5 V, and the rated output line to neutral voltage is 20 V. The load resistance of each phase is 2. 8 , and the input inductance is 20 mH. The switching frequency in the input stage is 1 kHz, and the switching frequency in the output stage is 4 kHz.…”
Section: Resultsmentioning
confidence: 99%
“…(7), (8), and (9) together, the RMS value of the positive-sequence component is determined by Substituting Eq. (10) into Eqs.…”
Section: Analysis Of Input Currents Under Unbalanced Load Conditionsmentioning
confidence: 99%
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“…In the distribution system, where the penetration of renewable energy power plants and high power domestic loads (both in AC and in DC) is increasing, the use of a three-stage architecture is preferred. According to that, it was adopted by the main research groups and companies developing SSTs for distribution like FREEDM [6], UNIFLEX-PM [7], EPRI [8] and GE [9].…”
Section: Sst Architecturementioning
confidence: 99%
“…Many well-known MV SST designs are depicted in Fig. 1, including designs by Alstom [5], Bombardier [6], UNIFLEX [7], ABB PETT [8], GE Global Research [10], EPRI [9], ETH [11] and the FREEDM System Center [12], [13], [19].…”
Section: Introductionmentioning
confidence: 99%