Design and implementation of a secret key steganographic micro-architecture employing FPGA

Abstract

-In the well-known "prisoners' problem", a representative example of steganography, two persons attempt to communicate covertly without alerting the warden. One approach to achieve this task is to embed the message in an innocent-looking cover-media. In our model, the message contents are scattered in the cover in a certain way that is based on a secret key known only to the sender and receiver. Therefore, even if the warden discovers the existence of the message, he will not be able to recover it. In other words a covert or subliminal communication channel is opened between two persons who possess a secret key to reassemble its contents. In this article, we propose a video or audio steganographic model in which the hidden message can be composed and inserted in the cover in real-time. This is realized by designing and implementing a secret key steganographic micro-architecture employing Field Programmable Gate Arrays FPGA.

FPGA Hardware Architecture of the Steganographic ConText Technique

“…There have been some hardware architectures of steganographic algorithms reported in the literature [5,6]. In [5], a steganographic algorithm that instead of using conventional substitution and translation operations on the plaintext characters uses simple plaintext hiding in a random bit string called the hiding vector is reported.…”

“…In [5], a steganographic algorithm that instead of using conventional substitution and translation operations on the plaintext characters uses simple plaintext hiding in a random bit string called the hiding vector is reported. And in [6], a secret key steganographic algorithm is described, that given a message aims to hide it into a cover such that even if an attacker detects the existence of the message, the attacker will not be able to recover it without the secret key that is known only to sender and receiver. A comparison of the architecture results is shown in Table 3.…”