Design and Implementation of Fpga-Based FFT Co-Processor Using Verilog Hardware Description Language

Lee, Yung Chong; Chan, Yee Kit; Koo, Voon Chet

doi:10.2528/pierb20122806

Cited by 2 publications

(1 citation statement)

References 23 publications

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“…In the literature, the design of radar systems based on FPGA platforms has been the focus of many studies and research. FPGA board was employed to accelerate the computing speed of radar signal processing [13] and image formation algorithms [14]. In addition, FPGA board was used as an essential component of radar systems.…”

Section: Introductionmentioning

confidence: 99%

Development of an Ir-Uwb Radar System for High-Resolution Through-Wall Imaging

Saad¹,

Maali²,

Azzaz³

et al. 2022

PIER C

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Through-Wall-Imaging (TWI) radar offers considerable advantages for applications that require safety and security, such as disaster survivor rescue and tracking terrorist activities. In such situations, the use of an impulse UWB radar system is constantly increasing due to its ability to provide precise images of hidden targets in a short period of time. This paper presents a new radar system for through-wall imaging using an impulse-radio ultra-wideband (IR-UWB) signal. The radar system is built using a field-programmable gate array (FPGA) board, an oscilloscope, and Vivaldi antennas. The radar system transmits impulse signals, which have a monocycle shape with a 400-picosecond duration and a 4.6 GHz bandwidth. The FPGA board is used to produce impulse signals that have a short time duration in the sub-nanosecond range in order to expand the bandwidth of the generated signal and make the developed radar capable of providing high-resolution images. The FPGA-based implementation of the IR-UWB generator offers the flexibility to modify the spectrum characteristics of the generated signal. The receiver side of the radar system collects the echoes using the principle of synthetic aperture radar (SAR), and then the time-domain back-projection algorithm is applied to the radar echo to form 2D images. An indoor imaging experiment was carried out with two human targets to investigate the imaging capability of the designed IR-UWB radar. The obtained experimental results demonstrate that this radar has the potential to deliver high-resolution images of multiple human targets and identify their locations.

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Section: Introductionmentioning

confidence: 99%

Development of an Ir-Uwb Radar System for High-Resolution Through-Wall Imaging

Saad¹,

Maali²,

Azzaz³

et al. 2022

PIER C

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Design and Implementation of Synthetic Aperture Radar (SAR) Field-Programmable Gate Array (FPGA)-Based Processor

Chan

Lee²,

Koo

2022

Applied Sciences

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Synthetic aperture radar (SAR) is a unique imaging radar system that is capable of obtaining high-resolution images by using signal-processing techniques while operating in all weather and in the absence of a light source. The potential of SAR in a wide range of applications has led to new challenges in digital SAR processor design. On-board storage of SAR raw data is often not practical for real-time applications. The design of digital SAR processors is always restricted by the available space of the carrier system, data transfer rate, payload capacity and on-board power supplies. As reported in the literature, although customized hardware solutions could offer the desired performance, they are not feasible for low-volume production. This research aims to design and develop an efficient digital SAR processor by using field-programmable gate array (FPGA) with the consideration of hardware resources, processing speed and precision. In this paper, a hardware implementation of an FPGA-based SAR processor is presented. The implementation and architecture of the proposed SAR processor are highlighted in this paper. A MATLAB-based SAR processing range-Doppler algorithm (RDA) was developed as the benchmark for the development of an SAR processor. The target device, Altera Stratix IV GX FPGA EP4SGX230KF40C2, was selected for the design and implementation of an FPGA-based SAR processor. Comprehensive evaluations of the performance of the proposed SAR processor in terms of precision, timing performance and hardware resource utilizations are also presented. The proposed FPGA-based digital SAR processor achieves optimum performance in processing SAR signals for image formation. Evaluation shows that the designed SAR processor is capable of processing SAR images with ±1% difference error as compared to SAR images processed by MATLAB. The results also show a reduction in hardware usage via the implementation of an FPGA-based FFT/IFFT coprocessor. These promising results prove that the performance of the proposed processor is satisfactory and the achieved processing time, as well as the power consumption of the processor, outperformed existing implementations.

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Design and Implementation of Fpga-Based FFT Co-Processor Using Verilog Hardware Description Language

Cited by 2 publications

References 23 publications

Development of an Ir-Uwb Radar System for High-Resolution Through-Wall Imaging

Development of an Ir-Uwb Radar System for High-Resolution Through-Wall Imaging

Design and Implementation of Synthetic Aperture Radar (SAR) Field-Programmable Gate Array (FPGA)-Based Processor

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