The objective of this work is to establish an interface between two FPGAs using I/O interface available inside FPGAs for the purpose of reliable communication. The two FPGAs will be connected via UART protocol, to transfer data from one FPGA to another and vice versa. In this paper the transmitter and receiver are implemented on two separate ZYNQ boards. This calls for separate DDS for the modulation and demodulation of RF. The concept of twin DDS needs to be implemented in the transmitter and receiver. The data acquired by the receiver while undergoing the process of demodulation needs to include the offset values for proper reconstruction of image, if the inclusion of these values is missed out could lead to the ghosting artefact in the reconstructed images.