Design and Implementation of OpenCL-Based FPGA Accelerator for YOLOv2

Cui, Chenchen; Feng, Guorui; Li, Ziyu; Yue, Xin; Fang, Zhou; Wu, Ning

doi:10.1109/icct52962.2021.9657856

Cited by 4 publications

(3 citation statements)

References 5 publications

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“…This suggests that our accelerator is better suited for use in powerconstrained satellite edge devices. Additionally, compared to custom-designed accelerators such as those proposed in [56,57,59,61], our accelerator can deploy various network architectures, demonstrating greater versatility and scalability.…”

Section: Discussionmentioning

confidence: 99%

“…Additionally, the performance of our accelerator is compared with related state-of-theart work, as shown in Table 3. The studies referenced in [55][56][57] focused on accelerating the YOLOv2 network. Yu et al [55] proposed the OPU, a domain-specific FPGA overlay processor, implemented on the Xilinx XC7K325T FPGA.…”

Section: Performance Comparisonmentioning

confidence: 99%

“…Although their throughput slightly surpasses ours, our accelerator exhibits better energy efficiency. Cui et al [56] utilized the Winograd algorithm to accelerate convolution operations and developed a dedicated accelerator for YOLOv2 using a High-Level Synthesis tool based on OpenCL on the Arria 10 GX platform. Their implementation achieved a throughput of 248.7 GOPS and an energy efficiency of 9.01 GOPS/W, which are both lower than our design.…”

Section: Performance Comparisonmentioning

confidence: 99%

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Algorithm–Hardware Co-Optimization and Deployment Method for Field-Programmable Gate-Array-Based Convolutional Neural Network Remote Sensing Image Processing

Ni,

Wei,

Zhang

et al. 2023

Remote Sensing

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In recent years, convolutional neural networks (CNNs) have gained widespread adoption in remote sensing image processing. Deploying CNN-based algorithms on satellite edge devices can alleviate the strain on data downlinks. However, CNN algorithms present challenges due to their large parameter count and high computational requirements, which conflict with the satellite platforms’ low power consumption and high real-time requirements. Moreover, remote sensing image processing tasks are diverse, requiring the platform to accommodate various network structures. To address these issues, this paper proposes an algorithm–hardware co-optimization and deployment method for FPGA-based CNN remote sensing image processing. Firstly, a series of hardware-centric model optimization techniques are proposed, including operator fusion and depth-first mapping technology, to minimize the resource overhead of CNN models. Furthermore, a versatile hardware accelerator is proposed to accelerate a wide range of commonly used CNN models after optimization. The accelerator architecture mainly consists of a parallel configurable network processing unit and a multi-level storage structure, enabling the processing of optimized networks with high throughput and low power consumption. To verify the superiority of our method, the introduced accelerator was deployed on an AMD-Xilinx VC709 evaluation board, on which the improved YOLOv2, VGG-16, and ResNet-34 networks were deployed. Experiments show that the power consumption of the accelerator is 14.97 W, and the throughput of the three networks reaches 386.74 giga operations per second (GOPS), 344.44 GOPS, and 182.34 GOPS, respectively. Comparison with related work demonstrates that the co-optimization and deployment method can accelerate remote sensing image processing CNN models and is suitable for applications in satellite edge devices.

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Section: Discussionmentioning

confidence: 99%