Design and Implementation of Power-Efficient FSM based UART

Kamath, Abhay Taranath; Mendez, Tanya; Ramya, S; Nayak, Subramanya G.

doi:10.1088/1742-6596/2161/1/012052

Cited by 12 publications

(4 citation statements)

References 14 publications

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“…UART transceivers also improve the application of currently available technology [20]. In Paper [5], author is concerned with improvements in PDP and total power in relation to clock period changes. The Cadence NCSIM Simulator and Compiler is used for simulation and synthesis, and 45 and 90 nm GPDK library files are used for UART implementation.…”

Section: Literature Surveymentioning

confidence: 99%

Design and Implementation of Verilog Based High Speed Low Power UART

Ms. Banti Kumari,

Ms. Kanika Jindal,

Mr. Amit Bindal

2024

Int Res J Adv Engg Hub

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The most crucial component of serial communication is a microcircuit called a universal asynchronous receiver/transmitter (UART). Receive-transmitter asynchronous technology is known as UART, and it is widely used for device-to-device communication protocols. Using asynchronous serial communication at a speed that can be adjusted. A hardware communication technique called UART Asynchronous conditions occur when the output of the transmitting device and the receiving end are not in sync with a clock. In UART, receiving a signal is known as RxD, and transmitting a signal is known as TxD. In comparison to the existing conventional UART design, we were able to reduce delay by 29% and power usage by 33% using our approach. The effectiveness of the novel UART design is noticed with the reduction in delay and power consumption. Synthesis and simulation are done in Xilinx ISE and Modelsim and Verilog HDL is used to implement a unique UART design.

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Section: Literature Surveymentioning

confidence: 99%

Design and Implementation of Verilog Based High Speed Low Power UART

Ms. Banti Kumari,

Ms. Kanika Jindal,

Mr. Amit Bindal

2024

Int Res J Adv Engg Hub

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“…Once this step is completed, the VLC application converts data into a byte stream to send to the VLC modem. This byte stream is transmitted to the VLC modem in the form of universal asynchronous receiver transmitter (UART) data frames, whose structure is as follows: a start bit for synchronization between the two transceivers, 8 data bits, 1 or more parity bits to avoid possible errors during transmission, 1 or 2 stop bits that marks the end of the frame as illustrated in [21]. Since one byte equals eight bits, the transmission process for each byte involves one UART data frame.…”

Section: Transmission Processmentioning

confidence: 99%

Implementation of a Full-Duplex Visible Light Communication System

Fotso,

Mbe,

Ndjiongue

et al. 2024

Preprint

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In telecommunication research, most outputs are based on simulation and/or analysis. Practical implementations are scarce. This is the case with visible light communication systems. With the knowledge that there is a gap between theoretical and practical implementation, we propose in this paper a two-way light communication system that provides efficient transmitting and receiving of files between two nodes. First, we develop hardware consisting of an emitting antenna, a receiving antenna, and a microcontroller. In order to ensure file transmission, we also develop software using the MATLAB programming language. Experimental results indicate that the bit error rate (BER) of the system increases with the transmission range, the data rate, and the angle of incidence. Accordingly, the recovered files match the transmitted files without any error correction scheme. An appropriate choice of system parameters can allow the BER to reach zero. An effective data rate of 1 Mbps is obtained with a BER of $6\times10^{-6}$. In addition, when data communication is not taking place, the designed modems provide illumination to the environment to meet the other requirements of visible light communication. Finally, the designed light-communication system proves cost-effective and easy to implement.

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“…The Universal Asynchronous Receiver Transmitter (UART) is a popular interface used to control communication between computers and serial devices in the field of digital communication [2]. However, traditional serial interface chips are characterized by their complex structure, large volume, and high manufacturing cost, which not only increases circuit board complexity but also reduces its functionality [3].…”

Section: Introductionmentioning

confidence: 99%

Design and implementation of UART receiving module based on FPGA

Zhang

2023

ACE

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In modern electronic systems, data transmission is an essential requirement within and between boards, or between lower and upper computers. To ensure data transmission accuracy, communication protocols are established that must be followed by all parties involved. These protocols include UART (universal asynchronous transmitter and receiver), IIC (Inter-Integrated Circuit), SPI (Serial Peripheral Interface), USB2.0/3.0(Universal Serial Bus), and Ethernet. Among these protocols, UART is the most basic one and is widely used in embedded devices due to its simple circuit structure and low cost. With the exponential growth of information technology, UART-based embedded devices can easily achieve wired and wireless communication through various communication interfaces and wireless modules. In this paper, the author presents an example of a receiving module for UART communication that converts parallel data into string data. The entire module is developed using the hardware description language Verilog HDL. Simulations are performed using ModelSim, and the results demonstrate that the simulation waveform is consistent with the expected receiving data. This approach facilitates the transformation of serial data to parallel data, improving the efficiency and accuracy of data transmission.

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Design and Implementation of Power-Efficient FSM based UART

Cited by 12 publications

References 14 publications

Design and Implementation of Verilog Based High Speed Low Power UART

Design and Implementation of Verilog Based High Speed Low Power UART

Implementation of a Full-Duplex Visible Light Communication System

Design and implementation of UART receiving module based on FPGA

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