Design and Implementation of USB3.0 Data Transmission System based on FPGA

Abstract

Aiming at the problems of slow transmission speed and high hardware resources in the traditional USB data transmission system, a USB3.0 data transmission system based on FPGA is designed. The system uses FPGA as the core control chip, and EZ-USB FX3 realizes high-speed data transmission of USB3.0 synchronous Slave FIFO mode through GPIF II general programmable interface. The design scheme has high portability and expandability, can be widely applied to different communication projects. System performance analysis and test results show that the average transmission rate of the system can reach 328MB/S, and the logical resource occupancy rate is less than 1%, realizing high-speed data transmission.

Enhancing High-Speed Data Transfer in Fpga-Based Systems: An Innovative Usb 3.0 Communication Interface Design

“…In data transmission, with the growth of multimedia data such as images and videos in computer applications, the transmission rate of external device interfaces has been put forward a higher demand, and the maximum transmission speed of USB 3.0 can reach up to 5 Gb/s. The speed of USB 3.0 is faster than USB 2.0, and USB 3.0 has the advantage of lower power consumption [2][3][4]. The frequently used USB communication interface is not suitable for FPGA development, so developers need to design their own communication interface, resulting in lower development efficiency [5][6][7].…”