Design and modeling of high-Q variable width and spacing, planar and 3-D stacked spiral inductors

Manikandan, R.; Vanukuru, Venkata Narayana Rao; Chakravorty, Anjan; Amrutur, Bharadwaj

doi:10.1109/isvdat.2014.6881053

Cited by 9 publications

(7 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Reducing R min reduces the width of inner turns while increasing the spacing between them. This results in reduction of current crowding in the inner turns and thereby increasing the inductor Q [8]. In-spite of having a constant pitch, reduced inner turn width increases the inner diameter of the inductor by a factor of 2 * (P − W in ), which is attributed to the smaller increase in inductance value shown in Fig.…”

Section: B Symmetric Spiral Inductorsmentioning

confidence: 99%

See 1 more Smart Citation

A parameterized cell design for high-Q, variable width and spacing spiral inductors

Manikandan¹,

Vanukuru

Chakravorty

et al. 2014

2014 IEEE International Microwave and RF Conference (IMaRC)

Self Cite

View full text Add to dashboard Cite

The on-chip planar spiral inductors having variable width (W ) and spacing (S) across their turns are known to exhibit higher quality factors (Q). In this paper, we present an efficient parameterized cell (pcell) design in cadence using SKILL scripts for automatic layout generation of these complex, high-Q, variable W &S spiral inductors comprising of single ended and symmetric structures with rectangular, hexagonal, octagonal and circular spirals.Electromagnetic simulations are performed on the inductor layouts generated using the developed pcells. The constant W &S and variable W &S spiral inductor structures are fabricated in a 0.18 µm silicon on insulator process. Measurements show ≃25% improvement in the quality factor of variable W &S spiral inductors compared to their constant W &S counterparts and also validates the proper operation of the developed inductor parameterized cells. The presented variable W &S inductor pcell significantly reduces the layout design time of RF circuit designers and also helps in the design automation of these complex inductor structures to boost their own performance and the RF circuits as well.Index Terms-parameterized-cell, proximity effect, quality factor, spiral inductor, silicon on insulator, CAD.

show abstract

Section: B Symmetric Spiral Inductorsmentioning

confidence: 99%

“…Parametrized inductor layout cells and its instance parameters in cadence graphical interface developed using SKILL scripts[8].…”

mentioning

confidence: 99%

A parameterized cell design for high-Q, variable width and spacing spiral inductors

Manikandan¹,

Vanukuru

Chakravorty

et al. 2014

2014 IEEE International Microwave and RF Conference (IMaRC)

Self Cite

View full text Add to dashboard Cite

show abstract

“…Due to the induced eddy current, the net current distribution on the metal strip concentrates on the inner edge of the strip and, thus, increases the metal resistance. To mitigate the influence of the eddy current, inductor designs with variable line widths and/or line spacing layouts have been presented [14][15][16][17][18][19][20][21][22][23][24][25]. Figure 1 shows the layout of a spiral inductor with a variable line width design.…”

Section: Introductionmentioning

confidence: 99%

“…The outer coils are therefore designed to have a wider line width to reduce the ohmic loss. With the variable line width design, high Q-factor spiral inductors can be developed and applied to improve the performances of various RFICs, such as LNAs and VCOs [21,25]. One is the intrinsic ohmic loss of the metal conductors and the other is the eddy-current loss due to the eddy current induced by the time-varying magnetic field passing through the metal strips.…”

Section: Introductionmentioning

confidence: 99%

Analytic Design of on-Chip Spiral Inductor with Variable Line Width

Chen¹,

Hsu²

2022

Electronics

View full text Add to dashboard Cite

On-chip spiral inductors with variable line width layouts are known for their high quality factor (Q-factor). In this paper, we present an analytical approach to facilitate the design of such inductors. Based on an analysis of ohmic and eddy-current losses, we first derive an analytical formula for the metal resistance calculation of a spiral inductor. By minimizing the metal resistance, a simple design equation for finding the proper line width of each coil is then presented. Several 0.18 μm CMOS spiral inductors are investigated, via electromagnetic simulations and experimental studies, to test the proposed resistance calculation, as well as the variable line width design method. It is found that the developed resistance calculation can effectively model the metal-line resistance of a spiral inductor. Moreover, the inductor with a variable line width obtained using the proposed method can significantly improve the Q-factor with little compromise to inductance, which validates the capacity of the developed variable line width design technique. Since the proposed approach can be carried out using analytical calculations, it may be a more efficient design method than those previously reported in the literature.

show abstract

“…However, these techniques had an expensive fabrication process. Various methods had proposed to improve the Q of the inductor without altering the manufacturing process, such as variable metal width and variable spacing between the metal turns (Manikandan et al , 2014; Hsu, 2005), differential excitation of the inductor (Danesh and Long, 2002) and parallel stacking of the metal layers (Chia-Hsin et al , 2003). Despite high performance, the spiral inductors are unable to achieve higher inductance for the miniaturized on-chip area (Kuhn and Ibrahim, 2001).…”

Section: Introductionmentioning

confidence: 99%

High-quality factor multipath differential fractal inductor for wireless applications

Tumma

Nistala

2021

View full text Add to dashboard Cite

Purpose The purpose of this study is to develop a high-quality factor fractal inductor for wireless applications such as satellite, WLAN, Bluetooth, microwave, radar and cellular phone. Design/methodology/approach The Hilbert fractal curve is used in the implementation of the proposed inductor. In the proposed inductor, the metal width has split into multiple paths based on the skin depth of the metal. The simulations of the proposed inductor are performed in 180 nm CMOS technology using the Advanced Design System EM simulator. Findings The multipath technique reduces the skin effects and proximity effects, which, in turn, decreases the series resistance of the inductor and attains high-quality factor over conventional fractal inductor for the equal on-chip area. Research limitations/implications The width of the path has chosen higher than the skin depth of the metal for a required operating frequency. Due to cost constraints, the manufacturing of the proposed fractal inductor is limited to a single layer. Practical implications The proposed inductor will be useful for the implementation of critical building blocks of radio frequency integrated circuits and monolithic microwave integrated circuits such as low-noise amplifiers, voltage-controlled oscillators, mixers, filters and power amplifiers. Originality/value This paper presents for the first time the use of a multipath technique for the fractal inductors to enhance the quality factor.

show abstract

Design and modeling of high-Q variable width and spacing, planar and 3-D stacked spiral inductors

Cited by 9 publications

References 19 publications

A parameterized cell design for high-Q, variable width and spacing spiral inductors

A parameterized cell design for high-Q, variable width and spacing spiral inductors

Analytic Design of on-Chip Spiral Inductor with Variable Line Width

High-quality factor multipath differential fractal inductor for wireless applications

Contact Info

Product

Resources

About