Design and optimization of reversible look ahead carry adder and carry save adder

Abstract

A circuit is said to be reversible if inputs and the outputs are equal. Reversibility focused mainly to bring down power to zero. In modern centuries, gates with reversible logic has arose together as notable vital approaches for power optimisation based on application. Reversible logic is leading area in power consumption. Based on its application, its emerging trend in power consumption. In ideal situations, reversible circuit yield nil power. In this paper, new design of the look ahead carry adder and carry save adder designed and it is optimized with the previous existing binary logic gates. Minimizing the garbage output and replacing the binary logic gates by reversible logic gates. To develop low power circuits, reversible circuit is necessary.