Design and Preliminary Evaluation of High‐Speed Line‐of‐Sight Calculation CMOS Image Sensor

Abstract

SUMMARY Line‐of‐sight (LoS) calculation, or detecting where the user is looking at, is expected as a new type of user interfaces, with including the phenomenon of rapid eye movement, so‐called saccade. However, real‐time tracking of saccade is difficult with the conventional image processing systems for their long processing time and latency against the speed of saccade. In this paper, we describe the design of the high speed, low latency LoS calculation image sensor, as well as its preliminary evaluation results. This image sensor has a capability to track the saccade at high frame rate, and generate the LoS calculation results with minimum latency for real‐time tracking.

Screening and testing methods of short-wave infrared area array detectors for synchronous monitoring atmospheric corrector

“…Where i y ~ is the fitting value corresponding to the i th measurement point of the fitting curve, and i y is the i th measured value of the light response curve. Finally, the root mean square of the relative deviation is calculated to further verify that the nonlinear error result of the light response curve is effective 12 :…”

CMOS image sensor for high speed and low latency eye tracking

“…Fig. 2 shows the CMOS image sensor architecture for high speed, low latency, and high resolution LoS calculation [9]. The architecture is composed of image sensor (pixel array) part and the column-parallel LoS calculation circuit, PE (processing element).…”

“…The PE's component of S, SX, and SY are composed of single-bit accumulator with read-out buffer as shown in Fig. 4, to form the ripplecarry accumulator [9]. Although the processing time for one column is proportional to the size of row, each PE processes each column's signal in parallel at high speed with using the conventional digital circuit implementation, such as 10 [MHz].…”

“…The author has already tried to design the CMOS image sensor for eye tracking based with the proposed column-parallel architecture. However, the fabricated CMOS image sensor has some problems in operation [9]. Based on this first version, we designed the second version with improvements to solve the problems in operation.…”