Design and simulation of hybrid SET-CMOS inverter using macro-model technique

Abstract

The single-electron transistor (SET) is one of the frontier device that can offer high operating speed at an ultra-low power consumption. SET macro-modeling, can be used for a SET-CMOS circuit simulation. In this work, we develop a new macro model of SET- CMOS hybrid whose is very useful effect in VLSI circuits design. All simulations are performed using environment SIMSCAPE of MATLAB SIMULINK. This architecture were realized by implementing the NMOS of conventional inverter with a SET macro-model. The simulation results show that the hybrid structure offers better performance. Indeed, the designed circuits are able to work at room temperature.