2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2016
DOI: 10.1109/patmos.2016.7833678
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Design and verification of analog CMOS circuits using the g<inf>m</inf>/I<inf>D</inf>-method with age-dependent degradation effects

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1
,
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3
et al.
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Cited by 6 publications
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Impact of Transistor Aging on the Reliability of the Analog Circuit

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The $\mathrm{g}_{\mathrm{m}}/\mathrm{I}_{\mathrm{d}}$ Methodology based Design and Optimization of Analog Circuits

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2020
2020 Third International Conference on Smart Systems and Inventive Technology (ICSSIT)
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