Design considerations of a novel Triple Oxide Trench Deep Gate LDMOS to improve self‐heating effect and breakdown voltage

Abstract

In this study, design considerations of a new device structure are presented to improve the self-heating effect (SHE) and the breakdown voltage of the Deep Gate LDMOS (Lateral Double Diffused Metal Oxide Semiconductor) transistor and compared with a conventional LDMOS (C-LDMOS). In this case, triple oxide trenches with an N + trench are embedded in the drift region. These trenches create additional peaks in the electric field profile, so the electric field is modified. The authors demonstrate that by optimising the trenches, the breakdown voltage of the device increases. Also, a partially buried oxide is used in the proposed structure to create a conduction path that significantly reduces the SHE. Moreover, the results indicate that the specific on-resistance, lattice temperature, and breakdown voltage of the proposed device are improved considerably compared to the C-LDMOS.

A Process Optimization Method of the Mini-LOCOS Field Plate Profile for Improving Electrical Characteristics of LDMOS Device

“…The PMICs fabricated with the bipolar-CMOS-DMOS (BCD) process own the advantages of highpower density, high speed, and easy integration [1,2]. Many researches have been published about LDMOS performance enhancement [3,4]. For example, Hebert et al [4] majorly focus on specific on-resistance performance improvement, and Gavoshani and Orouji [3] can effectively improve device robustness, including both the self-heating effect and breakdown voltage through a novel triple oxide trench deep gate LDMOS structure.…”