Design Exploration of Machine Learning Data-Flows onto Heterogeneous Reconfigurable Hardware

Abstract

Machine/Deep learning applications are currently the center of the attention of both industry and academia, turning these applications acceleration a very relevant research topic. Acceleration comes in different flavors, including parallelizing routines on a GPU, FPGA, or CGRA. In this work, we explore the placement and routing of Machine Learning applications dataflow graphs onto three heterogeneous CGRA architectures. We compare our results with the homogeneous case and with one of the state-of-the-art tools for placement and routing (P&R). Our algorithm executed, on average, 52% faster than Versatile Place&Routing (VPR) 8.1. Furthermore, a heterogeneous architecture reduces the cost without losing performance in 76% of the cases.

Algoritmos de Posicionamento e Roteamento baseados em Travessia de Grafo para Arquiteturas Reconfiguráveis de Grão Grosso (CGRA)

“…Estes algoritmos foram utilizados para validar às duas abordagens de posicionamento propostas [Canesche et al 2020. Além disso, foram utilizados para validar uma nova versão de posicionamento com SA do nosso grupo de pesquisa [Carvalho et al 2020, Oliveira et al 2020. A sétima contribuic ¸ão foi a validac ¸ão dos algoritmos de travessia com uma implementac ¸ão em hardware [Vieira et al 2021].…”

Heterogeneous reconfigurable architectures for machine learning dataflows

“…This article is an extension of our conference paper. 12 In the previous version of this work, our main contribution was to explore homogeneous and heterogeneous CGRA for machine learning dataflows considering only the functionality heterogeneity case. We proposed three heterogeneous architectures that considered multipliers as the critical functionality resource.…”

“…We also demonstrated that it is impossible to map some simple dataflow patterns in mesh topologies without the aid of buffers. This article is an extension of our conference paper 12 . In the previous version of this work, our main contribution was to explore homogeneous and heterogeneous CGRA for machine learning dataflows considering only the functionality heterogeneity case.…”

Design exploration of machine learning data-flows onto heterogeneous reconfigurable hardware

“…Heuristic approaches provide approximate solutions and scalability without the guarantee of optimality. By employing techniques such as local search based on graph level (Ferreira et al, 2005), genetic algorithms (Silva et al, 2006), graph traversal approaches (Canesche et al, 2020(Canesche et al, , 2021, or simulated annealing (Luu et al, 2011;Oliveira et al, 2020a), heuristics can efficiently explore large solution spaces and find good-quality solutions within reasonable time frames.…”

“…We also demonstrated that it is impossible to map some simple dataflow patterns in mesh topologies without the aid of buffers. This paper is an extension of our conference paper (Oliveira et al, 2020a). In the previous version of this work, our main contribution was to explore homogeneous and heterogeneous CGRA for machine learning dataflows considering only the functionality heterogeneity case.…”