Design, fabrication, and analysis of p-channel arsenide/antimonide hetero-junction tunnel transistors

Abstract

Articles you may be interested inUltrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding Appl. Phys. Lett. 106, 073503 (2015); 10.1063/1.4906922Operation of the GaSb p-channel metal-oxide-semiconductor field-effect transistors fabricated on (111) In this paper, we demonstrate InAs/GaSb hetero-junction (hetJ) and GaSb homo-junction (homJ) p-channel tunneling field effect transistors (pTFET) employing a low temperature atomic layer deposited high-j gate dielectric. HetJ pTFET exhibited drive current of 35 lA/lm in comparison to homJ pTFET, which exhibited drive current of 0.3 lA/lm at V DS ¼ À0.5 V under DC biasing conditions. Additionally, with pulsing of 1 ls gate voltage, hetJ pTFET exhibited enhanced drive current of 85 lA/lm at V DS ¼ À0.5 V, which is the highest reported in the category of III-V pTFET. Detailed device characterization was performed through analysis of the capacitance-voltage characteristics, pulsed current-voltage characteristics, and x-ray diffraction studies. V C 2014 AIP Publishing LLC.[http://dx

Relaxed germanium-tin P-channel tunneling field-effect transistors fabricated on Si: impacts of Sn composition and uniaxial tensile strain

“…37 Further performance scaling of GeSn pTFET can be achieved with L G scaling and exploration of GeSn hetero-tunnel junction.…”

Growth, strain relaxation properties and high-κ dielectric integration of mixed-anion GaAs1-ySby metamorphic materials

“…[1][2][3][4] It has been reported that the device performance has been improved significantly by utilizing a GaAs 0.35 Sb 0.65 layer in n-channel In 0.7 Ga 0.3 As/GaAs 0.35 Sb 0.65 staggered gap TFET structures when compared with In 0.7 Ga 0.3 As homojunction TFET device structures. 23,31 Meanwhile, it is equally important to develop high-performance p-type TFET devices within the same material system to enable complementary energy efficient logic circuits.…”

“…[1][2][3][4] In a mixed As/Sb-based InGaAs/GaAsSb TFET structure, GaAs 1-y Sb y materials having a high Sb composition (>60%) are desirable for reducing the tunneling distance from the source to the channel. 3 The detailed strain relaxation state of each GaAs 1-y Sb y layer within each structure was analyzed from symmetric (004) and asymmetric (115) RSMs.…”

“…This also preserve and maintain staggered band alignment for a mixed As/Sb-based TFET structure. [1][2][3][4] The surface morphology and root-mean-square (rms) roughness of each structure was characterized by atomic force microscopy (AFM) in contact mode using 20 lm  20 lm surface scans. All samples exhibit a smooth surface with low rms roughness ranging from 1.18 nm (sample B) to 1.85 nm (sample D).…”

“…INTRODUCTION GaAs 1-y Sb y is a promising material currently being considered for both microelectronic and optoelectronic applications. The use of GaAs 1-y Sb y as an active layer material has been reported for high performance tunnel field effect transistors (TFETs), [1][2][3][4] ultra-low noise high electron mobility transistors, 5 and near infrared photodetectors. 6 Moreover, GaAs 1-y Sb y can also be used as a metamorphic buffer to provide a high-quality "virtual" substrate for integrating highperformance devices with flexible substrates.…”