Design, Fabrication and Characterization of Parylene-Packaged Thin-Film Transistors

Abstract

A micro-fabricated parylene-packaged flexible pentacene thin film transistor is presented. Different from preceding devices that have been reported, this thin film transistor employs parylene as the substrate, the gate insulator and also the encapsulation layer. Also, this thin film transistor uses pentacene, an organic semiconductor with high mobility, as the active material. The transistor consists of Au/Cr gates and Au source and drain electrodes and takes a bottom-contact configuration. The freshly made thin film transistor shows a hole mobility of 0.084809 cm2/V-s with an on-off ratio of 104.

Improved Parylene-Packaged Pentacene Thin-Film Transistors

“…Previously, we demonstrated the first flexible parylene-pentacene electronics where parylene is exclusively used as the substrate, gate insulator and encapsulation layer (5). This device took bottom contact configurations and used parylene as gate dielectrics.…”

Improved Parylene-Packaged Pentacene Thin-Film Transistors

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We present here the newly-improved parylenepackaged pentacene thin-film transistors (TFT) for bioimplantation applications. Previously we have successfully fabricated parylene-packaged pentacene TFTs [1]. However, those devices were subject to low hole mobility, which was around 0.05 cm 2 /V-s.

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“…A 1-µm parylene-C was deposited as top-protecting layer. Finally, the whole parylenepentacene TFTs was liftoff from the photoresist in a flexible MEMS form [1].…”