2011
DOI: 10.3788/gzxb20114007.1051
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Design Method of a Freeform HMD System with Large Pupil Size

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Cited by 2 publications
(2 citation statements)
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“…Dividing vector S into 2 1 r − ( ) words, each continuous w bits as a word, we can design a w-bit wide, 2 1 r − ( ) addresses on-chip memory in FPGA and write each w-bit word of vector S sequentially into this on-chip memory. Hence, in each time period, we can read the w-bit data from each address of the on-chip memory and xor them with the coming w-bit scrambling data to accomplish w-bit parallel descrambling function [5].…”
Section: Is (2 1)mentioning
confidence: 99%
“…Dividing vector S into 2 1 r − ( ) words, each continuous w bits as a word, we can design a w-bit wide, 2 1 r − ( ) addresses on-chip memory in FPGA and write each w-bit word of vector S sequentially into this on-chip memory. Hence, in each time period, we can read the w-bit data from each address of the on-chip memory and xor them with the coming w-bit scrambling data to accomplish w-bit parallel descrambling function [5].…”
Section: Is (2 1)mentioning
confidence: 99%
“…The appraisal of freeform surface quality is an important research field for freeform surface optical systems [1][2] . The difference between designed and real surfaces affects the quality of systems, damaging the clearance of image 3 .…”
Section: Introductionmentioning
confidence: 99%