Design Methodology for a Wideband, Low Insertion Loss, Digital Step Attenuator in SiGe BiCMOS Technology

Cheon, Clifford D.; Rao, Sunil G.; Lim, Wonsub; Cardoso, Adilson S.; Cho, Moon-Kyu; Cressler, John D.

doi:10.1109/tcsii.2021.3111177

Cited by 7 publications

(2 citation statements)

References 16 publications

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“…Typically, its realizations can be classified as active-type [ 7 ] and passive-type categories [ 8 ], which should be determined on the basis of system specifications and performance requirements, including insertion loss (IL), resolution, tuning range, operating bandwidth, amplitude/phase error, and compactness. Compared to the method using a variable gain amplifier (VGA), the main-stream solutions prefer digital-step attenuator (DSA) since it offers high linearity, high switching speed, bidirectional wideband operation and fine amplitude control without any power consumption [ 9 , 10 ]. Currently, there is still a wide demand for single DSA designs for the following applications: (1) novel topologies specifically studied for DSAs to improve their RF performance [ 6 , 8 , 11 ], which do not need to be integrated with other functional chips; (2) Off-chip integration is required for wideband multimode multichannel receiver systems where several narrowband signals are multiplexed through a common attenuator; (3) Attenuator-first software-defined radios (SDRs) for communication infrastructure require a single MMIC DSA solution [ 12 ]; and (4) Customized DSA chip designs based on customer requirements for different bands.…”

Section: Introductionmentioning

confidence: 99%

A 10–20 GHz 6-Bit High-Accuracy Digital Step Attenuator with Low Insertion Loss in 0.15 µm GaAs p-HEMT Technology

He,

Yu,

Chen

et al. 2023

Micromachines

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In a beamforming circuit for a modern broadband phased-array system, high accuracy and compactness have received sufficient attention as they are directly related to side lobe level and fabrication cost, respectively. In order to meet the low phase error required, this paper proposed an ultra-broadband 6-bit digital step switched-type attenuator (STA) with capacitive/inductive compensation networks. Compared to the conventional methods, the proposed technique employs an improved simplified T-structure with capacitive compensation networks, which simultaneously achieves low insertion loss and high-accuracy amplitude/phase control. In addition, on-chip level shifting circuit is integrated to avoid complex control schemes. The strategy of prioritizing return loss is adopted to alleviate the performance degradation caused by impedance mismatch after cascade. As a proof-of-principle demonstration, a wideband 6-bit STA with core area of only 0.5 mm × 1.8 mm was designed via 0.15-micrometer GaAs pHEMT technology. It exhibits ultra-broadband operation with a 31.5 dB amplitude tuning range and a 0.5 dB tuning step. The insertion loss of the reference state is 4–5.3 dB. The return loss is better than 15 dB for all the 64 states. The RMS amplitude and phase errors are less than 0.2 dB and 2° over the 10 to 20 GHz.

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Section: Introductionmentioning

confidence: 99%

A 10–20 GHz 6-Bit High-Accuracy Digital Step Attenuator with Low Insertion Loss in 0.15 µm GaAs p-HEMT Technology

He,

Yu,

Chen

et al. 2023

Micromachines

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show abstract

“…The conventional digital step attenuation cells are shown in Figure 1 and mainl tain distributed type [10], switched-path type [11,12], and π-type/T-type [7,8,[13][14][15]. attenuation cells have different characteristics depending on their topologies.…”

Section: Introductionmentioning

confidence: 99%

A C/X/Ku/K-Band Precision Compact 6-Bit Digital Attenuator with Logic Control Circuits

Zeng

Yuan

et al. 2022

Electronics

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This paper proposes a C/X/Ku/K band 6-bit digital step attenuator (DSA) which employs a variety of improved attenuation cells to achieve a wide bandwidth, stable amplitude variation, stable phase variation, and small area. In this paper, the improved T-type, π-type, and switched-path type topologies are analyzed theoretically and applied to different attenuation values to achieve the optimal attenuator performance. In addition, in order to reduce the complexity and to improve the stability of the overall radar system, the logic control circuit is integrated in the DSA chip in this paper. Finally, the proposed attenuator is implemented in 0.15μm GaAs technology, which has a maximum attenuation range of 31.5 dB with 0.5 dB steps. The proposed DSA exhibits a root-mean-square (RMS) attenuation error of less than 0.15 dB and an RMS phase error of less than 3°, at 4–24 GHz. The insertion loss (IL) and the area of the DSA are 4.3–4.5 dB and 1.5 mm × 0.4 mm, respectively. Benefiting from the improvements of the attenuation cells and the characteristic of GaAs technology with strong resistance to radiation and power processing capability, the proposed DSA is suitable for spaceborne radar systems.

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A 42.5–51.0 GHz SiGe BiCMOS Integrated Tunable Bandpass Filter and Attenuator

Moradinia

Cheon

Coen

et al. 2022

2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)

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Design Methodology for a Wideband, Low Insertion Loss, Digital Step Attenuator in SiGe BiCMOS Technology

Cited by 7 publications

References 16 publications

A 10–20 GHz 6-Bit High-Accuracy Digital Step Attenuator with Low Insertion Loss in 0.15 µm GaAs p-HEMT Technology

A 10–20 GHz 6-Bit High-Accuracy Digital Step Attenuator with Low Insertion Loss in 0.15 µm GaAs p-HEMT Technology

A C/X/Ku/K-Band Precision Compact 6-Bit Digital Attenuator with Logic Control Circuits

A 42.5–51.0 GHz SiGe BiCMOS Integrated Tunable Bandpass Filter and Attenuator

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