Design of a 1.5 V full-swing bootstrapped BiCMOS logic circuit

Chik, R.Y.V.; Salama, C.A.T.

doi:10.1109/4.406395

Cited by 15 publications

(4 citation statements)

References 5 publications

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“…Some BiCMOS inverters have been studied in [4], [6], [8] and [9]. In this paper two example of BiCMOS inverter circuits are discussed and compared to each other as conventional designs which are shown in Fig.…”

Section: Related Workmentioning

confidence: 99%

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Design of Low Voltage and High-Speed BiCMOS Buffer for Driving Large Load Capacitor

Kaviani¹,

Sharifi

Dolatshahi³

et al. 2016

IJEM

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BICMOS circuits are interesting for designers when a high speed output driver is required especially in I/O circuits. Buffer is an important block in high speed circuits, so designing a buffer with high drive capability has a great effect on circuits with large load capacitor. This paper presents a new BiCMOS buffer which uses 32nm technology node for CMOS transistors and 0.18um technology node for BJT transistors. The proposed buffer operates properly in voltage ranges from 0.8v to 1.5v. The capacitor range is from 0.5pf to 200pf; the overshoot of the output in this capacitor range is less than 10% of the supply voltage that is negligible. The proposed design has improvements in delay for about %88 respectively compared to similar CMOS buffers with high capacitor values.

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Section: Related Workmentioning

confidence: 99%

“…In this paper two example of BiCMOS inverter circuits are discussed and compared to each other as conventional designs which are shown in Fig. 1 capacitance is discharged and consequently output voltage is equal to '0' [9].…”

Section: Related Workmentioning

confidence: 99%

Design of Low Voltage and High-Speed BiCMOS Buffer for Driving Large Load Capacitor

Kaviani¹,

Sharifi

Dolatshahi³

et al. 2016

IJEM

View full text Add to dashboard Cite

show abstract

“…The performances of all the circuits, namely, BSBiNMOS [6], BFBiNMOS [7], CMOS and TC-BiNMOS were verified by HSPICE simulation based on a 0.5-m BiCMOS technology. A two-input NAND configuration was chosen to evaluate and compare the performance of the circuit as shown in Fig.…”

Section: Performance Evaluationmentioning

confidence: 99%

“…For instance, several BiCMOS circuits use shunting elements across the base-emitter or the collector-emitter junctions of the output bipolar transistor to realize full-swing operation, but at the expense of a poor rise response [4]. While the circuit reported in [5] requires a complementary BiCMOS process, the BS-BiCMOS [6] suffers from high crossover capacitance/fanout [7]. Others involve additional circuits like pre-charge level generator, and charge pump circuit to supply secondary voltage that is higher than the primary supply voltage [8], [9].…”

Section: Introductionmentioning

confidence: 99%