2022
DOI: 10.1049/tje2.12211
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Design of a fully integrated VHF CP‐PLL frequency synthesizer with an all‐digital defect‐oriented built‐in self‐test

Abstract: This paper presents the design of an on-chip charge pump phase-locked loop (CP-PLL) with a fully digital defect oriented built-in self-test (BIST) for very-high frequency (VHF) applications. The frequency synthesizer has a 40 to 100 MHz tuning range and uses a ring voltage-controlled oscillator for frequency synthesis. The PLL exhibits a phase noise of -132 dBc/Hz at 1 MHz and consumes 1.8 mW on a 3 V supply. The BIST implementation uses fewer external input or output, is capable of efficient fault diagnosis, … Show more

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Cited by 3 publications
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“…Thus, the smaller the delay time, the better the module’s performance, allowing it to become superior [ 26 , 27 , 28 , 29 , 30 , 31 ]. In particular, the error for the delay time of the module was 1.8% compared to the delay time in [ 26 ], which could reach the 98.2% level for the accuracy, reliability, and reproducibility of the module [ 32 , 33 ].…”
Section: Discussionmentioning
confidence: 99%
“…Thus, the smaller the delay time, the better the module’s performance, allowing it to become superior [ 26 , 27 , 28 , 29 , 30 , 31 ]. In particular, the error for the delay time of the module was 1.8% compared to the delay time in [ 26 ], which could reach the 98.2% level for the accuracy, reliability, and reproducibility of the module [ 32 , 33 ].…”
Section: Discussionmentioning
confidence: 99%