Design of a micro-beamformer for a 2D piezoelectric ultrasound transducer

Blaak, Sandra; Yu, Zili; Meijer, G.C.M.; Prins, Christian; Lancée, C.T.; Bosch, Johan G.; Jong, Nico de

doi:10.1109/ultsym.2009.5441534

Cited by 54 publications

(23 citation statements)

References 4 publications

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“…We selected a 3 × 3 configuration to achieve a reasonable acoustic imaging quality, while reducing the number of cables by a factor of 9 [20]. Accordingly, the 864 receive elements of the transducer matrix are divided into 96 sub-arrays and interfaced with 96 sub-array receiver circuits in the ASIC.…”

Section: B Sub-array Beamforming In Receivementioning

confidence: 99%

A front-end ASIC with receive sub-array beamforming integrated with a 32 × 32 PZT matrix transducer for 3-D transesophageal echocardiography

Chen

Bera

et al. 2016

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)

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This paper presents a power-and area-efficient front-end ASIC that is directly integrated with an array of 32 × 32 piezoelectric transducer elements to enable next-generation miniature ultrasound probes for real-time 3-D transesophageal echocardiography. The 6.1 × 6.1 mm 2 ASIC, implemented in a low-voltage 0.18 m CMOS process, effectively reduces the number of cables required in the probe's narrow shaft by means of 96 delay-and-sum beamformers, each of which locally combines the signals received by a sub-array of 3 × 3 elements. These beamformers are based on pipeline-operated analog sample-and-hold stages, and employ a mismatch-scrambling technique to prevent the ripple signal associated with mismatch between these stages from limiting the dynamic range. In addition, an ultra-low-power LNA architecture is proposed to increase the power-efficiency of the receive circuitry. The ASIC has a compact, element-matched layout, and consumes less than 230 mW while receiving. Its functionality has been successfully demonstrated in 3-D imaging experiments.

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Section: B Sub-array Beamforming In Receivementioning

confidence: 99%

A front-end ASIC with receive sub-array beamforming integrated with a 32 × 32 PZT matrix transducer for 3-D transesophageal echocardiography

Chen

Bera

et al. 2016

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)

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“…After the compensation, the propagation attenuation is partially compensated for, thus significantly reducing the output dynamic range and relaxing the input dynamic range requirement of the remaining circuits. These circuits will perform local beamforming to combine the signals of several elements [1] and communicate these combined signals to bedside equipment where fine-TGC and further image processing will be performed.…”

Section: The Time-gain-compensation Schemementioning

confidence: 99%

“…Our research project is to design an ultrasound probe for 3D TransEsophageal Echocardiography (TEE) using a 2D piezoelectric matrix transducer [1]. Due to the large element count (≈ 2000) of this transducer and the limited cable space in the gastroscopic tube, it is necessary to locally combine the signals of several elements and thus reduce the number of cables.…”

Section: Introductionmentioning

confidence: 99%

Design of a low power time-gain-compensation amplifier for a 2D piezoelectric ultrasound transducer

Yao

Pertijs

et al. 2010

2010 IEEE International Ultrasonics Symposium

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In this paper, a programmable time-gaincompensation amplifier dedicated to a 2D piezoelectric ultrasound transducer is presented. It uses an open-loop amplifier structure consisting of a voltage-to-current converter and a current-to-voltage converter. The circuit has been designed in a standard 0.35-μm CMOS process. Simulation and measurement results show that gains of 0dB, 12dB, 26dB and 40dB can be achieved for input signals centered at 6MHz with 80dB dynamic range (100μV to 1V). The measured gain errors at 6MHz are below 1dB for all gain settings. The amplifier consumes only 130μW when driving a 250fF load.

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“…Digital beamforming is precise and flexible, but requires an analogue-to-digital converter (ADC) for each transducer element. For applications such as 3D transesophageal echocardiography [1], in which ultrasound signals from a large number of transducer elements are processed simultaneously, analogue beamforming is preferred for its better power efficiency. In previous work [2,3], analogue beamformers using the so-called pipelined-sampled-delay-focusing (PSDF) architecture have been proposed.…”

Section: Introductionmentioning

confidence: 99%

Ultrasound beamformer using pipeline-operated S/H delay stages and charge-mode summation

Pertijs

Meijer

2011

Electron. Lett.

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The proposed ultrasound beamformer is based on the delay-and-sum beamforming principle. The circuit consists of several programmable delay lines. Each delay line is constructed by pipeline-operated sample-and-hold (S/H) stages with digitally-assisted delay control, which ensure delay-independent gain and good timing accuracy. The summation is realised in the charge domain using the charge-averaging method, which consumes virtually no extra die area or power. A prototype beamformer has been fabricated in a 0.35 mm CMOS process to interface nine transducer elements. Measurement results show that this circuit consumes much less power and chip area than the prior art, while maintaining good accuracy and flexibility.Introduction: In an ultrasound receiver system, a beamformer is used to align signals received from various transducer elements in time by appropriately delaying these signals and then coherently summing them. A beamformer can be implemented either in the digital domain or in the analogue domain. Digital beamforming is precise and flexible, but requires an analogue-to-digital converter (ADC) for each transducer element. For applications such as 3D transesophageal echocardiography [1], in which ultrasound signals from a large number of transducer elements are processed simultaneously, analogue beamforming is preferred for its better power efficiency. In previous work [2, 3], analogue beamformers using the so-called pipelined-sampled-delay-focusing (PSDF) architecture have been proposed. Compared to a purely digital beamforming solution involving a large number of ADCs, the PSDF architecture greatly reduces the hardware complexity. The signals received from various transducer elements are sampled and stored in a so-called analogue first-in first-out (AFIFO) memory and read out after a certain time delay for summation at the output of the AFIFO. However, the delayed signals are added in the voltage domain, which typically involves an operational amplifier and extra circuit components. Instead of summing the signals in the voltage domain, an analogue beamformer using switched-current delay lines has been presented in [4], which performs the summation in the current domain. However, since the piezo-electric transducers typically used in an ultrasound system produce an output in the voltage domain by nature, the current-mode operation requires extra circuitry for voltage-to-current (V/I) conversion. As explained in [4], the linearity and bandwidth of the V/I converter are very challenging design aspects. In this Letter, we propose an analogue beamformer using an architecture similar to the PSDF architecture, but with signal summation in the charge domain. The whole circuit is not only very simple, but it consumes much less power and requires less chip area than the prior art, showing good accuracy, while providing flexible programmability.

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Design of a micro-beamformer for a 2D piezoelectric ultrasound transducer

Cited by 54 publications

References 4 publications

A front-end ASIC with receive sub-array beamforming integrated with a 32 × 32 PZT matrix transducer for 3-D transesophageal echocardiography

A front-end ASIC with receive sub-array beamforming integrated with a 32 × 32 PZT matrix transducer for 3-D transesophageal echocardiography

Design of a low power time-gain-compensation amplifier for a 2D piezoelectric ultrasound transducer

Ultrasound beamformer using pipeline-operated S/H delay stages and charge-mode summation

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